TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 87

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

3. VICRAWINTR (Raw Interrupt Status Register)
4. VICINTSELECT (Interrupt Select Register)
[31:0]
[31:0]
[Description]
[Description]
a. <RawInterrupt>
a. <IntSelect>
Bit
Bit
Note: Since this LSI supports only one FIQ source, only one of the bits in this register can be set to 1. Before
relation .
sources please
sources please
This bit shows IRQ interrupt status before masked. Refer the Figure 3.7.2 Status flag
RawInterrupt [31:0] correspond to interrupt source numbers 31 to 0, respectively.
About the information for interrupt sources of each circuit, refer the Table 3.7.1 Interrupt
This bit controls Selects interrupt type.
IntSelect bit must set before interrupt generation.
IntSelect [31:0] correspond to interrupt source numbers 31 to 0, respectively.
About the information for interrupt sources of each circuit, refer the Table 3.7.1 Interrupt
Example: When bit 0 of this register is set to 1, a WDT interrupt (interrupt source number 0) has been requested.
Example: When bit 0 of this register is set to 1, the WDT interrupt (interrupt source number 0) is set to be of the FIQ
changing the setting of this register, be sure to disable the relevant interrupts. Do not change the setting of
this register while the interrupt is active and enabled.
RawInterrupt
IntSelect
Symbol
Symbol
type.
Bit
Bit
RO
R/W
Type
Type
TMPA901CM- 86
Undefined
0x00000000
Reset
Reset
Value
Value
IRQ interrupt status before masked
(for each bit)
0y0: Interrupt is inactive.
0y1: Interrupts is active.
Selects interrupt type (for each bit)
0y0: IRQ
0y1: FIQ
Address
Address
(0xF400_0000) + (0x0008)
(0xF400_0000) + (0x000C)
Description
Description
TMPA901CM
2010-07-29