MCZ33781EK Freescale Semiconductor, MCZ33781EK Datasheet

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... Figure 1. 33781 Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2007-2009. All rights reserved. DIFFERENTIAL DSI 2.02 MASTER ORDERING INFORMATION Device MCZ33781EK/R2 +25V 33781 VCC VSUP1 1.0μF SCLK0 ...

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... Figure 2. 33781 Internal Block Diagram VSUP2 Pseudo Bus Switch DPH D0H DBUS Driver/Receiver D0L Pseudo Bus Switch DPL D1H DBUS Driver/Receiver D1L D2H DBUS Driver/Receiver D2L D3H DBUS Driver/Receiver D3L GND GND GND VSS Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Reset 2 SCLK0 Input 3 MOSI0 Input 4 MISO0 Output 5 SCLK1 Input 6 MISO1 Output 7 CS0 Input 8 AGND Ground 9 CS1 Input 10 VSS Ground 11 VDD Power Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS RST CS0 CS1 9 24 VSS 10 23 VDD 11 22 VPP 12 21 VCC ...

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... This supply input is used to provide the positive level output of buses 0 Positive Supply for and 1. Bus Outputs Bus 0 high side High Side Bus 0 Bus 0 low side Low Side Bus 0 Bus power return Power Ground page 15. Definition Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Symbol ...

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... I PD 5.0 Analog Integrated Circuit Device Data ≤ 90°C, unless otherwise A Typ Max Unit mA – 16 – 33 – – 10.0 – 12.0 – 9.9 V – 25 μ +0 1.0 - 0.5 pF – 10 – – 0.8 V – μA – 10 – 10 μA -30 -10 μ μ Freescale Semiconductor ...

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... VSUPn - DnD MID_OFFSET 9. Worst Case Disabled Low Side Bus Leakage for DnL occurs with DnL = V current can exceed 1mA. This is not measured in production. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 5.25V, 9.0V ≤ V ≤ 25V,-40°C ≤ SUPn Symbol (7)(8) ...

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... DPLLK COMP 5.0 HIGH COMP 5.0 LOW COMP 6.0 ADD Analog Integrated Circuit Device Data ≤ 90°C, unless otherwise A Typ Max Unit 8.0 16.0 Ω Ω 8.0 16.0 Ω – 1.0 – 20 μA – 20 μA 6.0 7.0 mA 6.0 7 Freescale Semiconductor ...

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... SCLKn, MOSI0 Notes 10. Not measured in production. 11. SPI signal timing from the production test equipment is programmed to ensure compliance. 12. Conditions are verified indirectly during test. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 5.25V, 9.0V ≤ V ≤ 25V,-40°C ≤ T SUPn CC Symbol t CLKHI t ...

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... BIT – – 5.3 – – 1.0 – – 1.0 – – 1.0 3.0 5.0 7.0 2 BIT BIT t BIT 1 BIT BIT t BIT Analog Integrated Circuit Device Data Freescale Semiconductor Unit V/μs V/μs kbps μs μs μs μs μs μs ...

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... Common Mode Current Noise Rejection (2.5ms max.) SPREAD SPECTRUM Base Frequency Range PSEUDO BUS Pseudo Bus On Delay Time Pseudo Bus Off Delay Time Notes 15. Not measured in production. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 5.25V, 9.0V ≤ V ≤ 25V,-40°C ≤ SUPn Symbol Min (15) t – ...

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... DVLD1 DnD V SUPn 6.5V 5.5V 4.5V 3.2V 2.8V 1. OUT 6.0mA 0mA t DRH 5.0V DSIR 0V 33781 12 TIMING DIAGRAMS t t BIT BIT Logic 1 Logic 0 t DVLD3 t DVLD2 t DRL Figure 4. DBUS Timing Characteristics t BIT t DVLD4 t SLEW(FRAME) t SLEW(SIGNAL Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... MID DnL 0V DnH V SUPn Over-voltage Threshold V + 2.25V MID V + 0.75V MID V (Clamped) MID V - 0.75V MID V - 2.25V MID DnL 0V Analog Integrated Circuit Device Data Freescale Semiconductor Figure 5. DBUS Normal Bus Waveforms Figure 6. DBUS Over-voltage Bus Waveforms TIMING DIAGRAMS DYNAMIC ELECTRICAL CHARACTERISTICS 33781 13 ...

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... V OH MISO1 X MSB Don’t care 70 VIL = 30% VCC, VOL = 30% VCC 33781 14 t CYC Figure 7. SPI0 Interface Timing t CYC Figure 8. SPI1 Interface Timing LAG LSB t DIS V OH LSB LAG DIS V OH LSB V OL Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... This is the SPIn data from SPIn to the SPIn master. Data changes on the negative (falling) transition of the associated SCLKn. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTIONS INTRODUCTION amount of change between the two bus wires, the capacitance to ground only conducts half as much current as it would if connected directly across the bus ...

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... Figure used to create the SUP1 is used SUP2 are required for internal functions: for is supplied REG_8V -derived charge pump SUP2 GND (32) D0H/L DBUS 0 Driver/ Receiver D1H/L DBUS 1 GND (24) DBUS 2 D2H/L DBUS 3 Driver/ Receiver D3H/L GND (18) Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... The SPI slave-type device, so MOSI0 (Master- Out-Slave-In input and MISO0 (Master-In-Slave-Out output. and SCLK0 are also inputs. CS0 Analog Integrated Circuit Device Data Freescale Semiconductor Supply Voltage VSUP Voltage Monitor Logic and Control Over-current Sensing Logic and Control Figure 10. Block Illustration The SPI0 port can handle 2-byte and 4-byte transfers ...

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... This differential signal is buffered and slew rate controlled by DnH DnH DnL DnL Common Common Mode Mode Correction Correction Table 6. T DSIS DSIR DnD Return Data Signal Low 1 0 Return Data Signal High High-impedance Idle High-impedance Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... To check for this, each of the three receiver filter Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTIONS FUNCTIONAL INTERNAL BLOCK DESCRIPTION outputs is passed to a CRC generation and checking block. ...

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... Receiver Receiver N/A 1 High Receiver Receiver L Sum0 Receiver Receiver 1 High Receiver Receiver N/A 1 High Receiver Receiver N/A 0 Sum0 Sum1 Receiver Receiver N/A 1 High Analog Integrated Circuit Device Data Freescale Semiconductor SPI1 Low Low Low Low Low Low Low Low Low Low ...

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... Base Time Period (from DxFSEL) 8 Analog Integrated Circuit Device Data Freescale Semiconductor the DxSSCTL registers) allowed beyond the base time period. The resulting value is added to the minimum bit time and fed to the bit clock logic, which generates the DSI bit clock. ...

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... CS0. If the address pointed to by the first byte is not a control shows an example of a write operation. During XXXXXXXX DATA FROM D0R0STAT shows the bit encoding for 16-bit SPI0 burst Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... ER Figure 16. SPI0 Communications, 32-Bit Burst Transfer Long Word DBUS Transfer Bit Definitions Analog Integrated Circuit Device Data Freescale Semiconductor addressable FIFO portion of the register set. In this case, the first byte is again the 1st address of the register to be accessed in this read/write, the second byte contains the upper two bits of the data to be written, and the third byte is the lower 8-bits of data to be written ...

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... During these buffer reads buffer position does not contain data skipped. After each buffer location is read it is cleared by the SPI1 logic. Figure 18. SPI1 16-Bit Burst Transfer Example Bit2 Bit1 Bit0 ADDR2 ADDR1 ADDR0 Bit2 Bit1 Bit0 FIX0 FIX1 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... DnH and/or DnL. When the minimum inter-frame delay has been satisfied, and CS0 has risen, and if no SPI0 framing error has occurred, DSIF will go low, indicating the start of a new transfer frame. Analog Integrated Circuit Device Data Freescale Semiconductor Bit 4 Bit 5 Bit 6 Bit 7 ...

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... Bits three to zero of the data and the CRC bits are lost. Data bits seven to four of the 16-bit response Figure VHDL Input Data = X4+1 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... The register pointer and bit pointer are used to control which registers and bits are being written to, and read from using Analog Integrated Circuit Device Data Freescale Semiconductor peripheral in line on the bus. Each peripheral responds to an address assignment only once (during the next message after the command that set its address) ...

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... The CRC bits are removed by the IC and not seen by the MCU, when reading the data registers. Operation of the CRC Check is covered in the section entitled CRC GENERATION / CHECKING on page 26. Analog Integrated Circuit Device Data Freescale Semiconductor CRC ...

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... D1R3H DBUS 1 Reg 3 Lower Byte 0011111 D1R3L Analog Integrated Circuit Device Data Freescale Semiconductor LOGIC COMMANDS AND REGISTERS of control registers, along with separate command and data registers, for queuing up to four commands. There are also registers containing check pattern data. Bit7 ...

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... D10 FIX0 FIX1 D10 FIX0 FIX1 D10 FIX0 FIX1 D10 FIX0 FIX1 - LOOP1 LOOP0 CRC CRC CRC POLY2 POLY1 POLY0 CRCSEE CRCSEE CRCSEE CRC CRC CRC LEN2 LEN1 LEN0 - DEV2 DEV1 DEV0 FSEL2 FSEL1 FSEL0 - - - - - - - - Freescale Semiconductor ...

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... NCKCD1 Negative Check Pattern 2 1011000 NCKCD2 RESERVED Writes/reads of this address 1011001 are ignored RESERVED Writes/reads of this address 1011010 are ignored Analog Integrated Circuit Device Data Freescale Semiconductor LOGIC COMMANDS AND REGISTERS Bit7 Bit6 Bit5 Bit4 Bit3 D15 D14 D13 D12 D11 ...

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... This bit indicates that data has been written to the associated channel register high and/or low, but has not been read for sending on the DBUS. The bit is set the rising Figure 24. Even Bit 10 Bit 9 Bit Bit 2 Bit 1 Bit Figure 26 FIX0 FIX1 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... IDLE voltage level. The time is measured from the end of a DBUS transaction (signaled by the start of the signal Analog Integrated Circuit Device Data Freescale Semiconductor During Idle mode, the current limit is independently sensed on both the high side and the low side of the bus driver. An over-current fault condition occurs if either DnH or DnL is within the sourcing or sinking limit (500mA) ...

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... Reads of this bit show the current state of the low side bus switch. The BSWL bit is cleared and the bus switch opened channel 0 thermal shutdown occurs, if the channel zero EN 29 BSWH BSWL EN (D0EN only) (D0EN only Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... A write to the register will abort any current activity on the bus. Any bit changes will take place on the next DBUS Analog Integrated Circuit Device Data Freescale Semiconductor stopped. If the write is to channel 0, the pseudo bus switches are also opened and the BSWH and BSWL bits are cleared. ...

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... This ID can reflect the version, design change number, or other encoded information. The purpose is for the central module CPU to be able to know what version of silicon Figure 33 DEV2 DEV1 DEV0 FSEL2 FSEL1 FSEL0 Table 8 gives some examples of the max bit = 4.0MHz. CLK Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... NCKPTN23 NCKPTN22 NCKPTN21 NCKPTN20 NCKPTN19 NCKPTN18 NCKPTN17 NCKPTN16 Reset 0 Read NCKPTN15 NCKPTN14 NCKPTN13 NCKPTN12 NCKPTN11 NCKPTN10 NCKPTN09 NCKPTN08 Reset 1 Read NCKPTN07 NCKPTN06 NCKPTN05 NCKPTN04 NCKPTN03 NCKPTN02 NCKPTN01 NCKPTN00 Reset 0 Figure 37. Negative Check Pattern Registers Bit Assignments Analog Integrated Circuit Device Data Freescale Semiconductor Figure ID6 ID5 ID4 ID3 Figure 35 ...

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... SPI0 and SPI1. The programmed inter-frame delay is then enforced (using the new values of the delay control bits) to allow reservoir capacitors in remote Analog Integrated Circuit Device Data Freescale Semiconductor Figure 6. ...

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... When loop mode is enabled the transmitter and receiver circuits are connected within the IC. This allows data to be passed directly through the transmit and receive circuits Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION PROTECTION AND DIAGNOSTIC FEATURES without going out on the DBUS channel. When LOOP mode ...

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... PACKAGING PACKAGE DIMENSIONS For the most current package revision, visit 33781 40 PACKAGING PACKAGE DIMENSIONS www.freescale.com and perform a keyword search using the “98A” listed below. EK SUFFIX (PB-FREE) 32-PIN 98ASA10556D ISSUE B Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Analog Integrated Circuit Device Data Freescale Semiconductor EK SUFFIX (PB-FREE) 32-PIN 98ASA10556D ISSUE B PACKAGE DIMENSIONS 33781 41 ...

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... PACKAGE DIMENSIONS 33781 42 EK SUFFIX (PB-FREE) 32-PIN 98ASA10556D ISSUE B Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Changed line to read: In addition, the device monitors the current limit on each channel 7/2008 4 to see if the channel is in “double current limit” during every idle state. In the CURRENT Protection • Changed Part Number from PCZ33781EK/R2 to MCZ33781EK/R2 11/2009 5.0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc ...