AT32UC3C2512C Atmel Corporation, AT32UC3C2512C Datasheet - Page 1048

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AT32UC3C2512C

Manufacturer Part Number
AT32UC3C2512C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C2512C

Flash (kbytes)
512 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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34.3
Figure 34-2. QDEC Block Diagram
34.4
34.5
34.5.1
32117C–AVR-08/11
Block Diagram
I/O Lines Description
Product Dependencies
I/O Lines
QEPA
QEPB
QEPI
QCF.FILTEN
Filter
Filter
Filter
Table 34-1.
In order to use this module, other parts of the system must be configured correctly, as described
below.
The QDEC pins are multiplexed with other peripherals. The user must first program the I/O Con-
troller to give control of the pins to the QDEC.
Pin Name
QEPB
QEPA
QEPI
Control
Clock
Advanced
filter
I/O Lines Description
GCLK_QDEC
CLK_QDEC_INT
Quadrature phase signal A
Quadrature phase signal B
Quadrature index signal
Pin Description
quadrature
decoder
compare event
QPulse
register
DIR
CMP
trigger event
Type
Input
Input
Input
revolution counter
position counter/
TOP register
CNT =
register
CAP
capture event
AT32UC3C
1048

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