AT32UC3C2512C Atmel Corporation, AT32UC3C2512C Datasheet - Page 892

• Manufacturer Part Number: AT32UC3C2512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32.6.3
32.6.3.1
32.6.3.2
32.6.3.3
32117C–AVR-08/11
USB Host Operation
Device detection
Description of pipes
Host Enabling
Figure 32-16 on page 892
Figure 32-16. Host mode states
After a hardware reset, the USBC host mode is in the Reset state (see
When the USBC is enabled (USBCON.USBE = 1) in host mode (USBSTA.ID = 0) it enters Idle
state and waits for a device connection. Once a device is connected, the USBC enters the
Ready state, which does not require the USB clock to be activated.
In host mode the USBC will suspend the USB bus by not transmitting any Start Of Frame (SOF)
packets (the Start of Frame Generation Enable bit in the Host Global Interrupt register
UHCON.SOFE is zero). The USBC enters the Suspend state when the USB bus is suspended,
and exits when SOF generation is resumed.
A device is detected by the USBC in host mode when DP or DM are not tied low, i.e., when a
device DP or DM pull-up resistor is connected. To enable this detection, the host controller has
to supply the device with VBUS power, which is done when USBSTA.VBUSRQ is one.
The device disconnection is detected by the host controller when both DP and DM are pulled
down.
In host mode, the term “pipe” is used instead of “endpoint”. A host pipe corresponds to a device
endpoint, as illustrated by
Figure 32-17 on page 893
describes the USBC host mode main states.
Clock stopped
Ready
Macro off
Device
Connection
SOFE = 1
Device
Disconnection
SOFE = 0
Idle
Suspend
Device
Disconnection
from the USB specification.
<any
other
state>
Section
AT32UC3C
32.6.1.1).
892