AT89LP3240 Atmel Corporation, AT89LP3240 Datasheet - Page 12

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AT89LP3240

Manufacturer Part Number
AT89LP3240
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT89LP3240

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
38
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
4.25
Eeprom (bytes)
8192
Self Program Memory
IAP
Operating Voltage (vcc)
2.4 to 3.6
Timers
3
Isp
SPI/OCD
Watchdog
Yes

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3.2
3.2.1
12
Internal Data Memory
AT89LP3240/6440
DATA
Figure 3-1.
The AT89LP3240/6440 contains 256 bytes of general SRAM data memory plus 128 bytes of I/O
memory mapped into a single 8-bit address space. Access to the internal data memory does not
require any configuration. The internal data memory has three address spaces: DATA, IDATA
and SFR; as shown in
internally. See
Figure 3-2.
The first 128 bytes of RAM are directly addressable by an 8-bit address (00H–7FH) included in
the instruction. The lowest 32 bytes of DATA memory are grouped into 4 banks of 8 registers
each. The RS0 and RS1 bits (PSW.3 and PSW.4) select which register bank is in use. Instruc-
tions using register addressing will only access the currently specified bank. The lower 128 bit
addresses are also mapped into DATA addresses 20H—2FH.
0100
007F
0000
0000
01FF
7FFF
LOWER
UPPER
128
128
Program Memory Map
Internal Data Memory Map
“External Data Memory”
Atmel Signature Array
User Signature Array
FFH
7FH
80H
Program Memory
0
AT89LP3240
Figure
AND INDIRECT
ADDRESSING
ADDRESSING
ACCESSIBLE
BY INDIRECT
ACCESSIBLE
DATA/IDATA
BY DIRECT
IDATA
ONLY
3-2. Some portions of external data memory are also implemented
below for more information.
0100
0000
0000
01FF
007F
FFFF
ADDRESSING
ACCESSIBLE
BY DIRECT
SFR
Atmel Signature Array
SPECIAL
FUNCTION
REGISTERS
User Signature Array
Program Memory
AT89LP6440
FFH
80H
PORTS
STATUS AND
CONTROL BITS
REGISTERS
STACK POINTER
ACCUMULATOR
(ETC.)
TIMERS
3706C–MICRO–2/11
SIGEN=1
SIGEN=0

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