adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 20

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adsp-bf539bbcz-5f8

Manufacturer Part Number
adsp-bf539bbcz-5f8
Description
Blackfin Embedded Processor
Manufacturer
Analog Devices, Inc.
Datasheet
ADSP-BF539/ADSP-BF539F
MPIVDD–MXVR PLL 1.25 V power
Fiber optic transceiver (FOT) connections
VOLTAGE REGULATOR LAYOUT GUIDELINES
Regulator external component placement, board routing, and
bypass capacitors all have a significant effect on noise injected
into the other analog circuits on-chip. The VROUT1-0 traces
and voltage regulator external components should be consid-
ered as noise sources when doing board layout and should not
be routed or placed near sensitive circuits or components on the
board. All internal and I/O power supplies should be well
bypassed with bypass capacitors placed as close to the ADSP-
BF539/ADSP-BF539F as possible.
For further details on the on-chip voltage regulator and related
board design guidelines, see the Switching Regulator Design
Considerations for ADSP-BF533 Blackfin Processors (EE-228)
applications note on the Analog Devices website
(www.analog.com)—use site search on “EE-228”.
• Should be routed with wide traces or as power plane.
• A ferrite bead should be placed between the 1.25 V V
• Locally bypass MPIVDD with 0.1 μF and 0.01 μF decou-
• Avoid routing other switching signals near to MPIVDD to
• The traces between the ADSP-BF539/ADSP-BF539F pro-
• The receive data trace connecting the FOT receive data
• The transmit data trace connecting the
• The receive data trace and the transmit data trace between
power plane and the MPIVDD pin for noise isolation.
pling capacitors to MXEGND.
avoid crosstalk.
cessor and the FOT should be kept as short as possible.
output pin to the ADSP-BF539/ADSP-BF539F MRX input
pin should not have a series termination resistor. The edge
rate of the FOT receive data signal driven by the FOT is
typically very slow, and further degradation of the edge rate
is not desirable.
ADSP-BF539/ADSP-BF539F MTX output pin to the FOT
Transmit Data input pin should have a 27 Ω series termi-
nation resistor placed close to the ADSP-BF539/ADSP-
BF539F MTX pin.
the ADSP-BF539/ADSP-BF539F processor and the FOT
should not be routed close to each other in parallel over
long distances to avoid crosstalk.
Rev. A | Page 20 of 60 | February 2008
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