adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 48

• Manufacturer Part Number: adsp-bf539bbcz-5f8
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

ADSP-BF539/ADSP-BF539F
JTAG Test And Emulation Port Timing
Table 33
Table 33. JTAG Port Timing
1
2
3
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristics
t
t
System Inputs=ARDY, BMODE1–0, BR, DATA15–0, NMI, PF15–0, PPI_CLK, PPI3-0, SCL1-0, SDA1-0, MTXON, MRXON, MMCLK, MBCLK, MFS, MTX, MRX, SPI1SS,
50 MHz maximum
System Outputs = AMS, AOE, ARE, AWE, ABE, BG, DATA15–0, PF15–0, PPI3–0, MTXON, MMCLK, MBCLK, MFS, MTX, SPI1SS, SPI1SEL1, SCK2-0,
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
DTDO
DSYS
SPI1SEL1, SCK2-0, MISO2-0, MOSI2-0, SPI2SS, SPI2SEL1, RX2-0, TX2-1, DR0PRI, DR0SEC, DR1PRI, DR1SEC, DT2PRI, DT2SEC, DR2PRI, DR2SEC, TSCLK3-0,
RSCLK3-0, TFS3-0, RFS3-0, DT3PRI, DT3SEC, DR3PRI, DR3SEC, CANTX, CANRX, RESET, and TMR2–0.
MISO2-0, MOSI2-0, SPI2SS, SPI2SEL1, RX2-1, TX2-0, DT2PRI, DT2SEC, DR2PRI, DR2SEC, DT3PRI, DT3SEC, DR3PRI, DR3SEC, TSCLK3-0, TFS3-0, RSCLK3-0,
RFS3-0, CLKOUT, CANTX, SA10, SCAS, SCKE, SMS, SRAS, SWE, and TMR2–0.
TCK
TMS
TDO
SYSTEM
OUTPUTS
INPUTS
TDI
SYSTEM
and
Figure 29
TCK Period
TDI, TMS Setup Before TCK High
TDI, TMS Hold After TCK High
System Inputs Setup Before TCK High
System Inputs Hold After TCK High
TRST Pulse Width
TDO Delay from TCK Low
System Outputs Delay After TCK Low
describe JTAG port operations.
t
DSYS
2
(Measured in TCK Cycles)
t
DTDO
t
SSYS
t
STAP
Rev. A | Page 48 of 60 | February 2008
t
1
TCK
3
1
Figure 29. JTAG Port Timing
t
HSYS
t
HTAP
Min
20
4
4
4
5
4
0
Max
10
12
Unit
ns
ns
ns
ns
ns
TCK
ns
ns