adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 47

• Manufacturer Part Number: adsp-bf539bbcz-5f8
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

Timer Cycle Timing
Table 32
input signal is asynchronous in “width capture mode” and
“external clock mode” and has an absolute maximum input fre-
quency of f
Table 32. Timer Cycle Timing
1
Parameter
Timing Characteristics
t
t
Switching Characteristic
t
The minimum pulse widths apply for TMRx input pins in width capture and external clock modes. They also apply to the PF1 or PPI_CLK input pins in PWM output mode.
WL
WH
HTO
CLKOUT
(PWM OUTPUT MODE)
EXTERNAL CLOCK MODES)
(WIDTH CAPTURE AND
and
TMRx
SCLK
TMRx
Figure 28
/2 MHz.
Timer Pulse Width Input Low
Timer Pulse Width Input High
Timer Pulse width Output (measured in SCLK Cycles)
describe timer expired operations. The
1
1
(Measured in SCLK Cycles)
(Measured in SCLK Cycles)
Rev. A | Page 47 of 60 | February 2008
t
Figure 28. Timer PWM_OUT Cycle Timing
WL
t
WH
t
HTO
ADSP-BF539/ADSP-BF539F
Min
1
1
1
Max
(2
32
– 1)
Unit
SCLK
SCLK
SCLK