adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 22

• Manufacturer Part Number: adsp-bf539bbcz-5f8
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

ADSP-BF539/ADSP-BF539F
Table 10. Pin Descriptions (Continued)
Pin Name
Parallel Peripheral Interface Port/GPIO
Controller Area Network
Media Transceiver (MXVR)/
General-Purpose I/O
PF0/SPI0SS
PF1/SPI0SEL1/TACLK
PF2/SPI0SEL2
PF3/SPI0SEL3/PPI_FS3
PF4/SPI0SEL4/PPI15
PF5/SPI0SEL5/PPI14
PF6/SPI0SEL6/PPI13
PF7/SPI0SEL7/PPI12
PF8/PPI11
PF9/PPI10
PF10/PPI9
PF11/PPI8
PF12/PPI7
PF13/PPI6
PF14/PPI5
PF15/PPI4
PPI3–0
PPI_CLK/TMRCLK
CANTX/PC0
CANRX/PC1
MTX/PC5
MTXON/PC9
MRX/PC4
MRXON
MXI
MXO
MLF
MMCLK/PC6
MBCLK/PC7
MFS/PC8
GP
Type Description
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O 5 V CAN Transmit/GPIO
I/OD
5 V
I/O
I/O
I /OD
5 V
I 5 V
I
O
A I/O MXVR Loop Filter (This pin should be pulled low when not used.)
I/O
I/O
I/O
I
Programmable Flag 0/SPI0 Slave Select Input
Programmable Flag 1/SPI0 Slave Select Enable 1/Timer Alternate Clock
Programmable Flag 2/SPI0 Slave Select Enable 2
Programmable Flag 3/SPI0 Slave Select Enable 3/PPI Frame Sync 3
Programmable Flag 4/SPI0 Slave Select Enable 4/PPI 15
Programmable Flag 5/SPI0 Slave Select Enable 5/PPI 14
Programmable Flag 6/SPI0 Slave Select Enable 6/PPI 13
Programmable Flag 7/SPI0 Slave Select Enable 7/PPI 12
Programmable Flag 8/PPI 11
Programmable Flag 9/PPI 10
Programmable Flag 10/PPI 9
Programmable Flag 11/PPI 8
Programmable Flag 12/PPI 7
Programmable Flag 13/PPI 6
Programmable Flag 14/PPI 5
Programmable Flag 15/PPI 4
PPI3–0
PPI Clock/External Timer Reference
CAN Receive/GPIO
MXVR Transmit Data/GPIO
MXVR Transmit FOT On/GPIO
MXVR Receive Data/GPIO (This pin should be pulled low when not used.)
MXVR FOT Receive On (This pin should be pulled high when not used.)
MXVR Crystal Input (This pin should be pulled low when not used.)
MXVR Crystal Output (This pin should be left unconnected when not used.)
MXVR Master Clock/GPIO
MXVR Bit Clock/GPIO
MXVR Frame Sync/GPIO
GPIO PC4–9 Enable (This pin should be pulled low when MXVR is used.)
Rev. A | Page 22 of 60 | February 2008
Driver
Type
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
2
2
1