mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet
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... Data Systems. The files are in the mcu332 directory in an archived file called 331_2ini.zip. See 6.2 Freeware Data Systems for the phone number for modem access and addresses for internet access. © Freescale Semiconductor, Inc., 2004. All rights reserved. MOTOROLA INC, 1996 ...
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... Freescale Semiconductor, Inc. Section 1 INTRODUCTION 2 DESIGNING THE HARDWARE 2.1 Using Data Bus Pins to Configure the MCU ................................................................................ 3 2.2 Choosing Memory Width .............................................................................................................5 2.3 Pins that Need Pull-Up Resistors ................................................................................................5 2.4 Using Sockets .............................................................................................................................6 2.5 Clock Circuitry .............................................................................................................................7 2.6 Getting Out of Reset ..................................................................................................................12 2.7 Power Supply ............................................................................................................................14 2.8 Designing for Electromagnetic Compatibility .............................................................................15 2.9 Connecting Memory and Peripherals ........................................................................................18 2.10 Using External Interrupts ...........................................................................................................22 ...
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... Freescale Semiconductor, Inc. 2 DESIGNING THE HARDWARE 2.1 Using Data Bus Pins to Configure the MCU The logic level of the data bus pins during reset determines many important operating characteristics of the MCU. Ensuring that the data bus known condition during reset is vital to proper operation because the state of each data bus pin is sampled on the rising edge of the RESET signal ...
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... Freescale Semiconductor, Inc. Tie 74HC244 inputs high or low, respectively, so that the desired logical values will be driven to the individ- ual data bus pins when the output enable (OE) pin is driven low. The OE will be driven low when the follow- ing three conditions are met: RESET is low, data strobe (DS) is high, and read/write (R/W) is high. ...
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... Freescale Semiconductor, Inc. 2.2 Choosing Memory Width One decision that must be made early in the design is the width of memory to be used. Systems with 8-bit wide memory, 16-bit wide memory or a combination of the two can be implemented using only the onboard chip-select lines. Using 8-bit memory simplifies the design and reduces cost, but with a significant performance penalty. This penalty is not fixed, but depends on the amount of time that the processor spends accessing the 8-bit mem- ory as opposed to accessing other external memory or performing internal accesses or operations ...
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... Freescale Semiconductor, Inc. 2. Hold DATA9 high during reset as described in 2.1 Using Data Bus Pins to Configure the MCU to assign all these pins to use as interrupt-request inputs. Pull up all lines that are to be used for interrupt service, including IRQ7, to five volts via 10 K resistors, hold DATA9 high during reset, reassign the pins that are not used for interrupt requests by writing to the port F pin assignment register, then change the IPL mask value to enable maskable interrupts ...
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... Freescale Semiconductor, Inc. Three socket manufacturers are: 3M — (800) 328-0411, AMP — (800) 522-6752, and Yamaichi — (408) 452-0797. 2.5 Clock Circuitry The designer must decide whether to use the internal frequency synthesizer circuit or an external clock to produce the system clock signal. Both options are discussed in the following paragraphs. ...
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... Freescale Semiconductor, Inc. The MCU is designed to use a 32.768 kHz AT-cut crystal to produce an 8.389 MHz CLKOUT signal. The frequency of the internal clock can be increased or decreased by writing to the SYNCR register. Figure 3 shows clock circuitry for a Daishinku DMX-38 32.768 kHz crystal, but the circuit will work for most other 32.768 kHz crystals also. To use other crystal values (the allowable range is 20 kHz– ...
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... Freescale Semiconductor, Inc. circuit values. The crystal manufacturer makes a tacit assumption that the amplifier has enough drive capa- bility to handle the required load, so that the output voltage levels of the amplifier are not affected. Parameters related to suppression of harmonics and overtones are generally not specified by the crystal manufacturer ...
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... Freescale Semiconductor, Inc. circuit board. If the dirt or grime that form the high resistance path inner layer of the printed circuit board, the board is unusable. If the leakage is due to condensation on the board, then spray the oscillator circuit with a protective epoxy GND Figure 5 DC Model of Oscillator Circuit 2 ...
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... Freescale Semiconductor, Inc. Do not run high frequency conductors near, and particularly underneath, the crystal, the feedback resistor or the series resistor. In Figure 6, only a ground trace runs underneath these components. Also note that, in Figure 6, the ground trace is tied to the ground pin nearest to the oscillator pins. This helps prevent large loop currents in the vicinity of the crystal ...
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... Freescale Semiconductor, Inc. maximum specified for the MCU. Any variation in the input frequency of the PLL is multiplied by the feed- back ratio of the PLL. If the MCU starts operating, i.e., reset is released and the internal clocks are gated to the internal buses, while the oscillator is operating at an overtone or first harmonic, the MCU will probably enter an inoperative state in which it cannot be restarted by a hardware reset ...
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... Freescale Semiconductor, Inc. +5V 10K 10–100 F When the internal PLL is used to generate the internal system clock, the RESET pin works as follows. At power-up, the MCU drives RESET low. When the PLL locks, the MCU releases RESET for two system clock cycles. If the external pull-up resistor can pull RESET to a logic one during the two cycles, the MCU as- sumes that the reset is a power-on reset rather than an external reset ...
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... Freescale Semiconductor, Inc. 2.7 Power Supply Always connect all power and ground pins to power sources. Internal power buses only serve about eight to ten pins each. The power and ground pins are usually not connected together within the device. If any power pin is left floating, the pins served by the floating power pin can receive power from internal circuitry such as internal protection diodes ...
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... Freescale Semiconductor, Inc. POWER SUPPLY DEVICE A Figure 10 Using LVI Devices with Multiple Power Supplies 2.8 Designing for Electromagnetic Compatibility Because of the fast clock speed and relatively short rise and fall times of MCU signals, the designer must consider electromagnetic compatibility (EMC) issues. All high-speed digital devices radiate noise, and if FCC compliance is required, the designer must do everything possible to limit emissions from the MCU ...
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... Freescale Semiconductor, Inc STBY 19 ADDR1 20 ADDR2 21 ADDR3 22 ADDR4 23 ADDR5 24 ADDR6 25 ADDR7 26 ADDR8 ADDR9 30 ADDR10 31 ADDR11 32 ADDR12 SSI 34 ADDR13 35 ADDR14 36 ADDR15 37 ADDR16 ADDR17 41 ADDR18 42 PQS0/MISO 43 PQS1/MOSI 44 PQS2/SCK 45 PQS3/PCS0/SS 46 PQS4/PCS1 47 PQS5/PCS2 48 PQS6/PCS3 ...
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... Freescale Semiconductor, Inc. Another way to control power supply noise created by the MCU is to put a small inductor in series with the power supply lines for the port drivers. This method can help control noise on the power traces of the PCB. However, it should be used only as a last resort, because it can introduce other noise problems. Also, a series inductor in the power supply line will probably have little effect on radiated noise, which is generally a result of the port driver switching speed ...
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... Freescale Semiconductor, Inc. • Localize any high frequency circuits, such as the clock and address or data buses. Decouple locally using high frequency filters such as ferrite chokes or damping resistors. Be sure to separate the high speed and low speed circuits. • Turn off any output signals (such as ECLK) that are not used. ...
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... Freescale Semiconductor, Inc. Table 2 Parameters Needed for Calculating Memory Access Times Parameter Clock Period (t ) CYC Clock Low to AS, DS, CS Asserted (t CLSA Data In Valid to Clock Low (Data Setup) (t Clock High to Address, FC, SIZE, RMC Valid (t Clock Low to AS, DS, CS Negated (t CLSN MCU read cycle access time is used to determine the number of wait states needed for a given memory speed, because it is longer than write cycle access time, and is thus the limiting factor ...
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... Freescale Semiconductor, Inc. by the state of the DATA0 line at the release of the RESET signal. The default bus width out of reset is 16 bits because the DATA0 line is pulled up to logic level one internally; however, the internal pull-up circuit is weak best to follow the recommendations in 2.1 Using Data Bus Pins to Configure the MCU For example, to design a system that uses 16-bit boot memory built from two 27C512 byte EPROMs, con- nect the chip-select and output enable lines of the EPROMs to the CSBOOT line ...
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... Freescale Semiconductor, Inc. —if both memories were connected to the same chip-select line, byte writes would corrupt the adjacent byte. This function can also be implemented in external logic by gating a single chip-select line with the MCU ADDR0 line to select upper and lower bytes. For ROM memory a single chip-select can be used to enable both byte-wide ROMs, as the MCU uses only the required byte on the data bus during a byte read and ig- nores the remaining byte ...
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... Freescale Semiconductor, Inc. MCU ADDR[16:0] DATA[15:0] DATA[15:8] CS0 UPPER BYTE ENABLE CS1 LOWER BYTE ENABLE CS2 READ ENABLE (BOTH BYTES) CSBOOT ROM ENABLE Figure 15 Configuring 16-Bit Memory with 8-Bit RAMs — Separate Read and Write Enables 2.10 Using External Interrupts The MCU has seven external interrupt lines, IRQ[7:1]. These are active low signals that cause the processor to jump to a special routine and then return to the main code ...
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... Freescale Semiconductor, Inc. 2.10.3 Interrupt Vectors Vectors are 32-bit addresses that point to the interrupt service routines (and other exception handlers). They are stored in a data structure called the exception vector table. There are 256 vector addresses in the ex- ception vector table; of these, 199 can be used for interrupts. The base address of the exception vector table is determined by the value stored in the vector base register ...
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... Freescale Semiconductor, Inc. 2.10.4.2 Autovectors When an external device cannot supply a vector number in response to an IACK cycle, an autovector can be used instead. The autovector number is determined by the priority of the interrupt request. For example, autovector number two corresponds to IRQ2. In order for an autovector to be used the IACK cycle must be terminated by an AVEC signal ...
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... Freescale Semiconductor, Inc. If the IRQ7 signal is asserted and the IPL field is written during execution of the interrupt service routine. This is true even when the mask is re-written to $7. Provide for negation of the signal within the service routine, and avoid writing to the SR during execution of the level seven interrupt service routine ...
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... Freescale Semiconductor, Inc. 3 ESTABLISHING COMMUNICATION 3.1 Communicating with the Target Board After a target board has been built generally necessary to communicate with it for debugging purposes. Although a designer can write a ROM monitor or modify CPU32Bug to communicate with the MCU via the serial port simpler and often more effective to use an emulator or the CPU32 background debug mode (BDM) for communication ...
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... Freescale Semiconductor, Inc. 10-Pin Connector 8-Pin Connector 1 — 2 — Only ten pins on the board, a special cable, and software are needed to debug. The M68ICD32 cable has a 10-pin female connector on one end and a PAL with a 25-pin connector on the other end. The 10-pin con- nector will plug directly into a male header or connector with the layout shown in Figure 17 ...
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... Freescale Semiconductor, Inc. The debugger should now work reliably. That is, programs can be downloaded into the RAM and executed. Alternatively, write the reset vector to memory location $000000. The reset vector is discussed in detail in 4.1.3.1 Initializing the Reset Vector 3.2 Communicating with Freescale Boards Third party vendors sell many types of development tools to help establish communication with the MCU. ...
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... Freescale Semiconductor, Inc. To load a program, perform the following sequence: CPU32Bug>LO Press the page up key on the PC keyboard. A small window will open and ask for the character protocol. Select ASCII. Then, when prompted to, type in the name of the S-record file. IBM-PC SERIAL PORT (DB-25 ...
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... Freescale Semiconductor, Inc. 3.2.2 The M68EVS331 and M68EVS332 The M68331/332 EVS is exactly the same as the M68EVK331/332, but has an additional daughter card called the M68DICARD. The user communicates with the DICARD, which in turn communicates with the MCU, with a program called DIBUG (version 1.03 is the latest version). One use for the DICARD is to re- program the EPROM on the BCC. See Application Snapshot (AS-52) for more information (Snapshots are available on-line — ...
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... Freescale Semiconductor, Inc. 4 SYSTEM INITIALIZATION 4.1 Configuring the Central Processing Unit Initial stack pointer and program counter values are fetched from boot ROM. Other CPU resources that must be initialized include the vector base register, the exception vector table, and the CPU status register. ...
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... Freescale Semiconductor, Inc. Vector Number Vector Offset (Decimal) (Hexadecimal 2–15 8–3C 16–23 40– 32–47 80–BC 48–63 C0–FC 64–255 100–3FC 4.1.3.1 Initializing the Reset Vector Immediately after the release of RESET, an internal state machine fetches the word values at addresses $000000 through $000006 and loads them into the stack pointer and program counter ...
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... Freescale Semiconductor, Inc. the address is $0000. This example is in the file “init_int.asm” in the archive “331_2ini.zip” on the Freeware Data System. This code can be assembled with the IASM32 assembler. org $0008 DW $0000 DW INT DW $0000 DW INT DW $0000 DW INT DW $0000 DW INT DW $0000 DW INT ...
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... Freescale Semiconductor, Inc. 1. Set the state of the module mapping (MM) bit. Its reset state is a one, and can be written once. MM determines where the internal control registers are located in the system memory map. When register addresses range from $7FF000 to $7FFFFF; when MM =1, register addresses range from $FFF000 to $FFFFFF ...
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... Freescale Semiconductor, Inc. 4.2.5 Periodic Interrupt Control Register (PICR) 1. Determine the appropriate PIT vector number and interrupt priority. 2. Write vector number and interrupt priority to PIV and PIRQL fields in PICR. 4.2.6 Chip-Select Pin Assignment Registers (CSPAR0 and CSPAR1) The chip-select pins can be used in a number of ways. CSPAR determine the functions of the pins. ...
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... Freescale Semiconductor, Inc. H. AVEC — This field determines whether a chip-select circuit generates an autovector in response to an IACK initiated by the assertion of an IRQ pin. For normal bus cycles, this field is not used chip-select circuit used to generate an IACK signal, program this field to zero to disable autovector generation ...
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... Freescale Semiconductor, Inc. * This section initializes the Chip Selects. MOVE.W #$0003,CSBARBT MOVE.W #$7870,CSORBT * Set up chip selects with a base address of $30000, block size of 64K MOVE.W #$0303,CSBAR0 MOVE.W #$0303,CSBAR1 MOVE.W #$0303,CSBAR2 MOVE.W #$5030,CSOR0 MOVE.W #$3030,CSOR1 MOVE.W #$6830,CSOR2 MOVE.W #$3FFF,CSPAR0 INITPIT * This section of code initializes the periodic interrupt timer to interrupt * every second ...
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... Freescale Semiconductor, Inc. B. Connect a DB-9 RS232 cable to connector J21. Connect J18 pin 13 (TXD) to J23 pin three. Con- nect J18 pin 14 (RXD) to J23 pin 1. Keep W20 at the factory setting of DCE. 2. When using ICD32, set the serial communications protocol for the COM port being used, 9600 baud, no parity, eight data bits, and one stop bit ...
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... Freescale Semiconductor, Inc. The following example illustrates how to initialize the QSPI in the wrap-around mode, with eight data bits per transfer and active-low peripheral chip-select pins. Modifying the code to disable the wrap-around mode is very simple. The modification is explained in the comments. The example is in the file “qspiinit.asm” in the archive “ ...
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... Freescale Semiconductor, Inc. INT RTE DATA DB 16 4.4.3 Initializing QSM Interrupts To enable interrupts on the QSM, initialize the following five fields: 1. ILPQSPI and ILSCI in the QILR register determine the priority levels of QSPI and SCI interrupts, re- spectively. If the fields are set to the same level, the QSPI takes priority. ...
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... Freescale Semiconductor, Inc. General-Purpose I/O: Many of the GPT pins can be used as general-purpose I/O. All that is needed to con- figure a pin to general-purpose I select the data direction in the data direction register (called PDDR in older manuals and DDRGP in newer manuals) and the actual data in the data register (called PDR in older manuals and PORTGP in newer manuals) ...
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... Freescale Semiconductor, Inc. 5. Set the interrupt enable bit for the channel in the timer interrupt mask register (TMSK1/2). This simply involves writing the channel's bit number to a one. To clear an interrupt, negate the appropriate interrupt status flag in the timer interrupt flag registers (TFLG1/TFLG2). Read the flag in the asserted state and then write a zero to the bit. As long as the interrupt status flag is set, the channel will continue to request interrupts ...
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... Freescale Semiconductor, Inc. ANDI.W #$7FFF,TFLG1 RTE OC4_INT: ADDI.W #$200,TOC4 ANDI.W #$BFFF,TFLG1 RTE OC1_INT: TST.B OC1D BNE DRIVE_PINS_LO ORI.W #$0038,OC1M BRA GET_TOC1 DRIVE_PINS_LO: ANDI.W #$FFC7,OC1M GET_TOC1: ADDI.W #$100,TOC1 ANDI.W #$F7FF,TFLG1 INT: RTE 4.6 Configuring the Time Processor Unit The time processor unit (TPU module on the MC68332. The MC68331 does not have a TPU. The TPU is an intelligent, semi-autonomous timer that has 16 independently-programmable channels ...
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... Freescale Semiconductor, Inc. 4.6.1 Control Registers The TPU has several control registers that are shared by all 16 channels. Some of these registers, such as the channel interrupt enable register and channel interrupt status register, are not always used. However, the TPU module configuration register, the channel function select registers, the host sequence registers, the host service request registers, and the channel priority registers should always be initialized ...
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... Freescale Semiconductor, Inc. conflicts do not occur within the host service request registers. If the channels are running, and cannot be disabled, write the host service request field for the first channel, then poll those bits until the TPU clears them. Then, write the host service request field for the second channel, wait until the TPU clears it, and so on ...
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... Freescale Semiconductor, Inc. The location in the vector table where the service routine starting address is stored is called the vector address. The vector address is calculated from the interrupt vector number — four times the vec- tor number plus the value in the vector base register. ...
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... Freescale Semiconductor, Inc. MOVE.W MOVE.W PRAMINIT: MOVE.W MOVE.W MOVE.W INIT_INTS: MOVE.L MOVE.W ANDI.W ORI.W ORI.W START: MOVE.W MOVE.W DONE BRA CH0_INT: ANDI.W ADDI.W INT: RTE MC68331/332 For More Information On This Product, M68331/332TUT/D ;function numbers may vary with different ;mask sets. #$00C5,TPUMCR ...
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... Freescale Semiconductor, Inc. Because of the complexity of the MCU, there are a considerable number of potential ‘fatal flaws’ that can cause a prototype application to either not operate from power up fail soon after. This section covers common problems, causes, and fixes.This is not an exhaustive discussion, but is intended to be used as a check list of the main problem areas that can cause an application to fail ...
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... Freescale Semiconductor, Inc. 5.2.3 Problem: CLKOUT Frequency is Incorrect 1. MODCLK is not driven correctly during reset. To use a crystal and the internal PLL, MODCLK must be driven high during reset. To use an external clock and bypass the internal PLL, MODCLK must be driven low during reset. 2. The crystal is settling into overtones due to a poor quality crystal or incorrect components in the crys- tal circuit ...
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... Freescale Semiconductor, Inc. happens, the driven pins on the device with the slow supply will momentarily have a higher voltage than the V pin. This condition can cause the input protection diodes to become momentarily for- DD ward biased and cause significant current injection into the device substrate, which will probably im- properly charge or discharge some of the internal nodes of the MCU ...
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... Freescale Semiconductor, Inc. 3. When a bus error occurs while the CPU is loading information from a bus error stack frame during execution of a return from exception (RTE) instruction. After the double bus fault occurs, the MCU drives the HALT line low and can only be restarted by a reset. ...
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... Freescale Semiconductor, Inc. In Table 8 the addresses for CS0 and CS10 conflict. Both will respond to the address $40000. CS0 is pro- grammed to start at $50000; however programmed incorrectly. It does not lie on an even boundary of 128 Kbytes (remember that 1 Kbyte = 1024 bytes). As shown in Table 9, only address lines 23 through 17 are compared for a block size of 128 Kbytes ...
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... Freescale Semiconductor, Inc. 6.1.2 Reference Manuals CPU32RM/AD M68300 Family CPU32 Central Processor Unit Reference Manual GPTMR/AD Modular Microcontroller Family General-Purpose Timer Reference Manual QSMRM/AD Modular Microcontroller Family Queued Serial Module Reference Manual SIMRM/AD Modular Microcontroller Family System Integration Module Reference Manual Modular Microcontroller Family Time Processor Unit Reference Manual TPURM/AD 6 ...
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... Freescale Semiconductor, Inc. TPUPN20/D Quadrature Decode TPU Function (QDEC) The TPU Literature Package (TPULITPAK/D) includes the TPU Reference Manual and a complete set of programming notes. 6.1.5 Development Tools and Software MCUDEVTLDIR/D Freescale Microcontroller Development Tools Directory 6.1.6 Books TB325/D The Freescale MC68332 Microcontroller TB328/D Programming Microcontrollers ...
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... Freescale Semiconductor, Inc. MC68331/332 For More Information On This Product, M68331/332TUT/D Go to: www.freescale.com 55 ...
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... Freescale Semiconductor, Inc. How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center ...