mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 12

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mc68336

Manufacturer Part Number
mc68336
Description
An Introduction To The Mc68331 And Mc68332
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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maximum specified for the MCU. Any variation in the input frequency of the PLL is multiplied by the feed-
back ratio of the PLL. If the MCU starts operating, i.e., reset is released and the internal clocks are gated to
the internal buses, while the oscillator is operating at an overtone or first harmonic, the MCU will probably
enter an inoperative state in which it cannot be restarted by a hardware reset. In this case, the only option
is to turn the system power off and then attempt a power-on reset.
Because oscillators are very sensitive circuits, malfunctions are difficult to diagnose by conventional means
such as probing the input and output with an oscilloscope. The capacitance of a scope probe can be large
compared to the effective capacitance of the particular node of the oscillator that is probed. This added ca-
pacitance can cause an errant oscillator to move to a more stable region where it appears to work correctly
or, on the other hand, a working oscillator could be moved into a region of no oscillation at all. Therefore, it
is important to measure oscillator performance indirectly. This can be done through the CLKOUT pin, which
is a buffered form of the internal system clock. Monitoring the CLKOUT pin with an oscilloscope does not
affect the oscillator and provides an accurate representation of oscillator problems. If the MCU is running
off the internal PLL and a 32.768 kHz crystal, the CLKOUT frequency should be 8.389 MHz at the release
of reset.
The CLKOUT signal is likely to do one of three things when power is turned on. It will either remain at a
constant DC level, jump quickly to the proper frequency, or, first jump to the desired frequency, then enter
a very high frequency metastable state and then jump back to the fundamental frequency. With a small
amount of practice, these metastable states, which last for approximately 100 to 500 ms, can be easily de-
tected on an oscilloscope. In the third case, the MCU generally takes almost a second to reach steady state,
which provides plenty of time for it to attempt operation while the clock is in a metastable state.
2.5.2.6 Using a Canned Oscillator
A second option when using the internal frequency synthesizer circuit is to hold MODCLK high during reset
and connect an external clock reference or canned oscillator (a single package that includes the oscillator
and required external components) to the EXTAL pin. Leave the XTAL pin floating, but connect the filter
circuit shown in Figure 7 to V
One manufacturer of canned oscillators is:
2.5.3 Using an External Clock
To use an external clock, connect a clock signal to the EXTAL pin and hold MODCLK low during reset.
Leave the XTAL and XFC pins floating, but connect V
SYNCR register have no effect; the signal applied to the EXTAL pin should appear unchanged on the CLK-
OUT line. The external clock must comply with the following expression.
Minimum external clock high/low time is a specification given in the device electrical characteristics.
2.6 Getting Out of Reset
Asserting and releasing the RESET line was once a relatively simple task. However, as microcontrollers
have become more complex, bidirectional reset pins have become standard. Bidirectional reset lines allow
an external device to reset the MCU and also allow the MCU to assert reset for associated peripherals. Bi-
directional pins must be driven with open collector devices. A typical circuit for driving the MCU RESET pin
is shown in Figure 8. The RESET pin is driven by an open collector device, and it is pulled to a logic one
by an 820
12
Oak Frequency Control Group — (717) 486-3411
Minimum external clock period
resistor.
Freescale Semiconductor, Inc.
DDSYN
For More Information On This Product,
and XFC. The allowable frequency range is 20-50 kHz.
=
Go to: www.freescale.com
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50% percentage variation of external clock input duty cycle
Minimum external clock high/low time
DDSYN
to power. The frequency control bits in the
M68331/332TUT/D
MC68331/332

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