mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 39

• Manufacturer Part Number: mc68336
• Description: An Introduction To The Mc68331 And Mc68332
• Manufacturer: Freescale Semiconductor, Inc

The following example illustrates how to initialize the QSPI in the wrap-around mode, with eight data bits
per transfer and active-low peripheral chip-select pins. Modifying the code to disable the wrap-around mode
is very simple. The modification is explained in the comments. The example is in the file “qspiinit.asm” in
the archive “331_2ini.zip” on the Freeware Data System. It can be assembled with the IASM32 assembler.
MC68331/332
M68331/332TUT/D
#SIZING_ON
INIT_SIM
INIT_QSPI
* The next command reads and clears the flags in SPSR. These flags are the
* QSPI finished flag (SPIF), the mode fault flag (MODF), and the halt
* acknowledge flag (HALTA). The SPIF bit is usually the flag of interest. It is
* set by the QSPI upon completion of a serial transfer when the address of the
* command being executed matches the ENDQP. If wrap-around mode is enabled, the
* SPIF bit is set each time the QSPI cycles through the queue. If interrupts
* are enabled, assertion of the SPIF bit causes an interrupt.
* The next command defines the initial states of the chip select signals in PORTQS
* (formerly called QPDR).
* The chip selects may be active high or active low. The initial state set in
* the PORTQS is the inactive state. The active state is selected in the command RAM
* In this example, the initial state of the chip
* select lines is high, and the initial state of SCK is low. This defines the
* chip selects to be active low and SCK to be active high. The SCI TXD signal
* bit is not affected.
* The next command sets the control parameters. Interrupts are not enabled. To
* enable interrupts upon assertion of the SPIF bit, set SPCR2[15]. To clear
* an interrupt, read and then clear the SPIF bit. Wrap-around mode is enabled.
* NEWQP is set to zero, and ENDQP is set to $F. Thus, the QSPI will
* continuously transmit the data between $0 and $F in the queue. To disable
* wrap-around mode so that the QSPI only goes through the queue once, clear the
* WREN bit (SPCR2[14]) to a zero.
LOOP
* The next command fills the command RAM in a right-justified manner. There is
* one byte of control information for each QSPI command to be executed in the
* queue. Here, all four chip selects will drive low during each serial transfer.
FINISH
INCLUDE
INCLUDE
INCLUDE
ORG
MOVE.B
CLR.B
ANDI.W
ANDI.B #$00,SPSR
MOVE.B #$7B,PORTQS
MOVE.B #$7B,PQSPAR
MOVE.B #$7E,DDRQS
MOVE.W #$8002,SPCR0
MOVE.W #$4F00,SPCR2
MOVE.B #$00,SPCR3
MOVEA.L #DATA,A0
MOVEA.L #TR0,A1
MOVEA.L #CR0,A2
MOVE.W #$10,D0
CLR.L D1
MOVE.B (A0)+,D1
MOVE.W D1,(A1)+
MOVE.B #$00,(A2)+
SUBI.W #$01,D0
BNE LOOP
MOVE.W #$8000,SPCR1
BRA FINISH
#$7F,SYNCR
SYPCR
#$7F,SPCR1
Freescale Semiconductor, Inc.
For More Information On This Product,
'equ332.asm'
'init_res.asm';include reset vector
'init_int.asm';include interrupt vectors
$400
Go to: www.freescale.com
;equates (for MC68331, select ‘equ331.asm’)
;begin program at $400, immediately after
;the exception table
;increase clock speed
;disable software watchdog
;Clear the SPE bit in SPCR1 to disable
;the QSPI. Enabling the QSPI is the last
;step in the initialization sequence.
;Assign all pins to the QSPI. Pins can be
;assigned to the QSPI or for general
;purpose I/O on a pin by pin basis.
;Select the direction of the signal lines
;as outputs, except for MISO.
;Configure the QSPI as master, select
;8 data bits per transfer, set the inactive
;state of SCK as low, capture data on the
;leading edge of SCK, baud rate is 4.19 MHz
;Disable loop mode, HALTA and MODF
;interrupts, and HALT.
;Point A0 to the address of the data to be
;transmitted.
;Point A1 to the transmit data RAM.
;Point A2 to the command RAM
;Set a counter to count down from 16 ($10),
;since there are 16 queue entries to fill.
;Clear D1. It will be used to fill the
;transmit RAM.
;Begin a loop to fill the transmit RAM.
;Store the data right-justified.
;Subtract one from the counter
;Fill next queue entry if not done
;Begin operation by setting the SPE bit.
;This is the last step of initialization.
;Normally, this would begin the next task.
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