mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 49

• Manufacturer Part Number: mc68336
• Description: An Introduction To The Mc68331 And Mc68332
• Manufacturer: Freescale Semiconductor, Inc

5.2.3 Problem: CLKOUT Frequency is Incorrect
Usually, it is impossible to observe oscillator operation with an oscilloscope connected to one of the oscil-
lator pins. The oscilloscope adds 3–30 pF and 1–10 M of loading to V
operation. When the oscilloscope is connected to the EXTAL input, the 10 M
forms a resistive divider with Rf and often disables the oscillator by biasing the circuit out of the linear region
of the EXTAL input. This problem can sometimes be overcome by capacitively coupling the oscilloscope
with a very small capacitor (1–5 pF) between the oscilloscope probe and the oscillator pin.
It is better to observe the CLKOUT signal, since this does not alter the operation of the oscillator. It may be
possible to observe XTAL since it is isolated from rest of oscillator by Rs. Observe I
connected and again with it connected. If I
unaffected. For additional information, see 2.5 Clock Circuitry.
5.2.4 Problem: System Crashes after Fetching Reset Vector
MC68331/332
M68331/332TUT/D
1. MODCLK is not driven correctly during reset. To use a crystal and the internal PLL, MODCLK must
2. The crystal is settling into overtones due to a poor quality crystal or incorrect components in the crys-
3. If the frequency is unstable, it is possible that the crystal is being overdriven. Increase Rs to reduce
4. There is residue on the PCB. Since low frequency crystal circuits tend to be very high impedance,
5. In the absence of other circuit problems, the series resistor is the most probable culprit when an os-
6. If the value of the series resistor is correct, check for the presence of metastable states during power-
1. Incorrect reset configuration of boot memory width is causing the address bus to increment by the
2. An IRQ7 interrupt is received during or immediately after reset. The MCU will recognize the interrupt
3. An interrupt is received, and the interrupt vectors have not been initialized. Make sure that the inter-
4. The BR or BGACK pin has floated low and the CPU has relinquished control of the bus. Configure
5. Some of the pins are being powered up before V
be driven high during reset. To use an external clock and bypass the internal PLL, MODCLK must be
driven low during reset.
tal circuit.
crystal drive.
the PCB must be clean, dry, and free of conductive material such as solder rosin and excessive mois-
ture from high humidity.
cillator will not start. The resistor limits the power that starts the crystal oscillating. If the resistance is
too low, the crystal will start oscillating in unpredictable modes and could even become damaged. If
the resistance is too high, the oscillator will start very slowly or not at all.
up. If there is extremely high frequency oscillation on the CLKOUT pin during the first few hundred
milliseconds of operation, and increasing the size of Rs does not fix the problem, the only real solution
is to find a different brand and/or style of crystal. There is no practical way to compensate for a crystal
that exhibits poor self-suppression of the first overtone and first harmonic. Once again, if a particular
crystal type and brand is prone to starting at overtones or harmonics, just don’t use it. No amount of
circuit design will ever compensate for a bad or poor quality crystal.
wrong amount during fetches of the reset vectors. Check DATA0 to make sure that it is being driven
to the correct state during reset. If CSBOOT is a 16-bit port, drive DATA0 high during reset; if it is an
8-bit port, drive DATA0 low. See 2.1 Using Data Bus Pins to Configure the MCU.
after fetching the reset information and first instruction. In a typical system that is booting out of ROM,
stack RAM will not be enabled at this point, and the first bus cycle to write the stack frame will hang
the MCU. Make sure that the IRQ[7:1] lines are either pulled up through resistors to 5 volts or config-
ure the pins as PORTF I/O lines by pulling DATA9 low during reset. Also, start-up software should
enable the stack RAM (by configuring the appropriate chip-select circuits) before enabling the inter-
rupt lines (by writing to the PFPAR register). This problem is likely to be intermittent, as it would only
occur if an IRQ7 interrupt is received in the short time before system initialization. See 2.1 Using
Data Bus Pins to Configure the MCU.
rupt vectors are initialized. See 4.1.3.2 Initializing Exception Vectors Other than Reset.
these pins for chip-select operation out of reset by pulling DATA1 high during reset, or put pull-up
resistors on these pins.
a separate power supply, use an LVI device to prevent the system with the faster power supply from
driving logic one level before the system with the slower power supply has become operational. If this
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DD
is unchanged, it is usually safe to assume the oscillator was
DD
. If the MCU is connected to another system with
ss
, which will usually affect oscillator
to V
DD
ss
without oscilloscope
(oscilloscope input)
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