mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 21

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mc68336

Manufacturer Part Number
mc68336
Description
An Introduction To The Mc68331 And Mc68332
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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—if both memories were connected to the same chip-select line, byte writes would corrupt the adjacent byte.
This function can also be implemented in external logic by gating a single chip-select line with the MCU
ADDR0 line to select upper and lower bytes. For ROM memory a single chip-select can be used to enable
both byte-wide ROMs, as the MCU uses only the required byte on the data bus during a byte read and ig-
nores the remaining byte.
Figure 14 illustrates how to connect two 8-bit memories as one 16-bit port. It also shows the connections
necessary for a 16-bit memory. In this example configuration, CS0 is connected to the chip enable pin (CE)
of the first RAM chip and CS1 is connected to the chip enable pin of the second RAM chip. This effectively
makes CS0 the upper byte enable and CS1 the lower byte enable. The R/W line of the MCU is connected
to the R/W lines of both RAM chips. CSBOOT is connected to the ROM enable. ADDR[13:1] of the MCU
are connected to address lines [12:0] of each RAM chip, and ADDR[16:1] of the MCU are connected to ad-
dress lines [15:0] of the ROM.
Another common configuration is shown in Figure 15. Here, the chip enables (CE) are always asserted, the
write enable (WE) for upper byte access is connected to CS0, the write enable for lower byte access is con-
nected to CS1, and the read enable (OE) for both upper and lower byte accesses are connected to CS2.
See 4.2.10 Example of SIM Initialization for software to initialize this example system.
MC68331/332
M68331/332TUT/D
Figure 14 Configuring 16-Bit Memory with 8-Bit RAMs — Common R/W Input
ADDR[16:0]
MCU
DATA[15:0]
CSBOOT
R/W
CS0
CS1
DATA[15:8]
UPPER BYTE ENABLE
LOWER BYTE ENABLE
ROM ENABLE
Freescale Semiconductor, Inc.
For More Information On This Product,
ADDR[13:1]
DATA
R/W
32K X 8
RAM
Go to: www.freescale.com
ADDR
CE
DATA[7:0]
ADDR[13:1]
DATA
R/W
32K X 8
RAM
ADDR
CE
DATA[15:0]
DATA
32K X 16
ROM
ADDR
CE
ADDR[16:1]
332TUT EXT MEM CONN 2
21

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