mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 37

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mc68336

Manufacturer Part Number
mc68336
Description
An Introduction To The Mc68331 And Mc68332
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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4.3 Configuring Internal RAM
The internal RAM is a module on the MC68332. The MC68331 does not have any internal RAM. The inter-
nal RAM on the MC68332 can be mapped to any 2 Kbyte boundary in the address map, but it must not over-
lap the module control registers. The RAM is disabled out of reset. To initialize the RAM, write the desired
base address to the RAM base address and status register (a write-once only register) and clear the
RAMDS bit to enable the RAM. Configure the RASP[1:0] bits in the RAM module configuration register to
select the access privileges.
If battery backup for the RAM is not used, connect the V
consult the MC68332 User’s Manual (MC68332UM/AD) for an explanation of calculating the capacitance
needed between the V
When using the ICD32 debugger, make sure not to display any potentially uninitialized memory in the F3
and F6 windows, because the debugger tries to read this memory and will display error messages if it is
uninitialized.
4.4 Configuring The Queued Serial Module
The queued serial module (QSM) is divided into two submodules: the serial communications interface (SCI)
and the queued serial peripheral interface (QSPI). The following sections give basic examples of QSM con-
figuration. See the QSM Reference Manual (QSMRM/QD) for more detailed information.
4.4.1 Configuring the SCI
The following example is in the file “sci_init.asm” in the archive “331_2ini.zip” on the Freeware Data System.
It can be assembled with the IASM32 assembler.
This program prints the five-character message “12345” to the screen. Do the following before running this
program:
MC68331/332
M68331/332TUT/D
1. Connect an RS-232 cable from the PC serial port to the target board. If using an M68EVK331/332,
connect a DB-9 RS232 cable to connector P9. If using an M68MEVB331/332, there are two options:
A. Connect a DB-25 RS232 cable to connector J22. Connect J18 pin 13 (TXD) to J23 pin four. Con-
* This section initializes the Chip Selects.
* Set up chip selects with a base address of $30000, block size of 64K
INITPIT
* This section of code initializes the periodic interrupt timer to interrupt
* every second. Make sure that other code (such as CPU32Bug) hasn't already
* initialized the Vector Base Register to something other than zero.
ITSELF
CLKINT
INT
nect J18 pin 14 (RXD) to J23 pin two. Keep W23 at the factory setting of DCE.
MOVE.W
MOVE.W
MOVE.W
MOVE.W
MOVE.W
MOVE.W
MOVE.W
MOVE.W
MOVE.W
MOVE.L #CLKINT,$0100
MOVE.W #$0640,PICR
MOVE.W #$0110,PITR
ANDI.W #$F0FF,SR
ORI.W #$0500,SR
ANDI.W #$FFF0,SIMCR
ORI.W #$0005,SIMCR
BRA ITSELF
ADDI.W #$01,(A0)
RTE
STBY
#$0003,CSBARBT
#$7870,CSORBT
#$0303,CSBAR0
#$0303,CSBAR1
#$0303,CSBAR2
#$5030,CSOR0
#$3030,CSOR1
#$6830,CSOR2
#$3FFF,CSPAR0
Freescale Semiconductor, Inc.
pin and ground.
For More Information On This Product,
Go to: www.freescale.com
;base address of $00000, block size of 64K
;both bytes, R/W, one wait state (if
;programming this code into ROM, set
;this field to $6B30).
;set CS0 base addr to $30000, 64K blk
;set CS1 RAM base addr to $30000, 64K blk
;set Chip Select 2 at base addr $30000
;set Chip Select 0, upper byte, write only
;set Chip Select 1, lower byte, write only
;set Chip Select 2, both bytes, read only
;set Chip Selects 0,1,2 to 16-bit ports
;store starting addr of interrupt routine
;at location $100 ($40 X 4). Assume VBR = 0.
;interrupt level 6, vector $40
;time-out period of 1 second
;mask interrupts below level 6
;set interrupt arbitration field to a
;unique value.
;stay here while waiting for interrupts
;interrupt routine for PIT
;increment first RAM location
;unused interrupts point here
STBY
pin to ground. If backup battery power is used,
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