mc68336 Freescale Semiconductor, Inc, mc68336 Datasheet - Page 4

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mc68336

Manufacturer Part Number
mc68336
Description
An Introduction To The Mc68331 And Mc68332
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Tie 74HC244 inputs high or low, respectively, so that the desired logical values will be driven to the individ-
ual data bus pins when the output enable (OE) pin is driven low. The OE will be driven low when the follow-
ing three conditions are met: RESET is low, data strobe (DS) is high, and read/write (R/W) is high.
Conditioning RESET with R/W and DS ensures that writes to external memory will be completed before the
74HC244s are enabled. Otherwise, if an external RESET signal was applied during a write to external mem-
ory and was not conditioned with R/W and DS, the 74HC244s would turn on during the write and cause data
bus contention.
There are several alternative methods of driving data bus pins low during reset. The easiest methods are
to connect a resistor in series with a diode from the data bus pin to the RESET line or to connect a transistor,
as shown in Figure 2 . When using a bipolar transistor, a base current limiting resistor is required. When
using field effect transistor, a base limiting resistor is not needed. However, the best method is to use the
configuration shown in Figure 1 .
4
TIE INPUTS
AS NEEDED
TIE INPUTS
AS NEEDED
DATA PIN
HI OR LO
HI OR LO
RESET
Figure 1 Circuitry to Drive Data Bus Pins During RESET Assertion
Figure 2 Alternate Methods of Conditioning Data Bus Pins
1K
IN1
IN8
IN1
IN8
74HC244
74HC244
Freescale Semiconductor, Inc.
OE
1N4148
For More Information On This Product,
OE
OUT1
OUT8
OUT1
OUT8
Go to: www.freescale.com
+5V
820
D15
D8
D7
D0
DATA PIN
RESET
MC68331 or MC68332
RESET
2K
10K
+5V
DS
10K
+5V
R/W
332TUT DAT RESET HOLD
M68331/332TUT/D
332TUT DAT PIN RESET
MC68331/332

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