pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 139

• Manufacturer Part Number: pef22504
• Description: Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
• Manufacturer: Infineon Technologies Corporation

Line Interface Mode 1
LIM1
Line Interface Mode 1
Field
CLOS
RIL2
RIL1
RIL0
JATT
RL
DRS
Data Sheet
Bits
7
6
5
4
2
1
0
Type
rw
rw
rw
rw
rw
rw
rw
Description
Clear Data in Case of LOS
0
1
Receive Input Threshold
Only valid if analog line interface is selected (LIM1.DRS = ´0´).“No signal”
is declared if the voltage between pins RL1 and RL2 drops below the
limits programmed by bits RIL(2:0) and the received data stream has no
transition for a period defined in the PCD register.
See DC characteristics for detail.
Transmit Jitter Attenuator
Note: JATT is only used to define the jitter attenuation during remote loop
0
1
Remote Loop
Note: RL is logically OR´d with automatic loop switching by BOM
0
1
Dual-Rail Select
0
1
B
B
B
B
B
B
B
B
in long-haul mode
detected
operation. Remote loop operation can be set by LIM1.RL Jitter
attenuation during normal operation is not affected by JATT.
data bypasses the remote loop jitter attenuator buffer.
RL1/2 or ROID is sent "jitter-free" on ports XL1/2 or XOID. The de-
jittered clock is generated by the DCO-X circuitry.
messages.
analog in/outputs.
on ports RDIP/RDIN while transmit data is output on pins
XDOP/XDON.
Normal receiver mode, receive data stream is transferred normally
Jitter attenuator is active for remote loop. Received data from pins
received data is cleared (driven to low level), as soon as LOS is
Transmit jitter attenuator is disabled for remote Loop. Transmit
Normal operation.
Remote Loop active.
The ternary interface is selected. Ports RL1/2 and XL1/2 become
The digital dual-rail interface is selected. Received data is latched
Offset
xx37
139
H
Register DescriptionLine Interface Mode 1
Rev. 1.3, 2006-01-25
QuadLIU
PEF 22504
Reset Value
80
TM
H