pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 98
pef22504
Manufacturer Part Number
pef22504
Description
Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF22504.pdf
(255 pages)
- Current page: 98 of 255
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3.7.8.3
In the absence of any input jitter the QuadLIU
theTable 25
Table 25
Specification
ITU-T I.431
ETSI TBR 12
PUB 62411
3.7.8.4
Figure 34
to
Curve 1 gives the default output wander were no additional programming of bits of registers GPC6, REGFP,
REGFD
Figure 34
For further improvement of the output wander (curve 2), the following programming of register bits must be done:
•
•
After that, the global registers
output wander for both channels:
•
•
•
•
Data Sheet
Table
GPC6. WAND_IMP = ´1´
WCON.WAND = ´03
Write ´30
Write ´AA
Write ´B0
Write ´31
and
49.
shows 2 curves for the output wander. For both, setting of the register bits of GCM1 to GCM8 is identical
H
H
Output Jitter
below.
Output Jitter
Output Wander
WCON
Output Wander
H
H
´ into REGFP
´ into REGFP
´ into REGFP
´ into REGFD
is necessary as described below. The corner frequency of the DCO-R is 2 Hz (see
H
´
Lower Cutoff
20 Hz
700 Hz
40 Hz
10 Hz
8 Hz
10 Hz
Broadband
REGFP
Measurement Filter Bandwidth
and
REGFD
TM
must be written with the following sequence to improve the
generates the intrinsic output jitter, which is specified in
98
Upper Cutoff
100 kHz
100 kHz
100 kHz
8 kHz
40 kHz
40 kHz
Intrinsic Output Jitter
(UI peak to peak)
< 0.015
< 0.015
< 0.11
< 0.015
< 0.015
< 0.015
< 0.02
Functional Description
Rev. 1.3, 2006-01-25
QuadLIU
PEF 22504
Table
23).
TM
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