pef22504 Infineon Technologies Corporation, pef22504 Datasheet - Page 158
pef22504
Manufacturer Part Number
pef22504
Description
Quad E1/t1/j1 Line Interface Component For Long- And Short-haul Applications Pef 22504 E, Pef 22504 Ht, Version 2.1
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF22504.pdf
(255 pages)
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Global Configuration Register
GCR
Global Configuration Register
Field
VIS
SCI
PD
Data Sheet
Bits
7
6
0
Type
rw
rw
rw
Description
Masked Interrupts Visible
See also
0
1
Status Change Interrupt
0
1
Power Down
Switches between power-up and power-down mode. After switching from
power down to power up a receiver reset should be made by setting of
CMDR.RRES.
0
1
B
B
B
B
B
B
visible in register GIS.
internal interrupt source.
deactivation of the internal interrupt source: ISR2.LOS, ISR2.AIS,
ISR3.LMFA16.
driven high by the weak internal pull-up device.
Masked interrupt status bits are visible in ISR(7:0), but they are not
Power down: All outputs are driven inactive; multifunction ports are
Masked interrupt status bits are not visible in registers ISR(7:0).
Interrupts are generated either on activation or deactivation of the
The following interrupts are activated both on activation and
Power up
Chapter 3.5.3
Offset
0046
158
Register DescriptionGlobal Configuration Register
H
Rev. 1.3, 2006-01-25
QuadLIU
PEF 22504
Reset Value
00
TM
H
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