m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 269

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

SERIAL I/O
11.2 Block description
Fig. 11.2.10 Structure of UARTi baud rate register (BRGi)
Fig. 11.2.11 Block diagram of transfer clock generating section
11-14
11.2.6 UARTi baud rate register (BRGi)
The UARTi baud rate register (BRGi) is an 8-bit timer exclusively used for UARTi to generate a transfer
clock. It has a reload register. Assuming that the value set in the BRGi is “n” (n = “00
divides the count source frequency by (n + 1).
In the clock synchronous serial I/O mode, the BRGi is valid when an internal clock is selected, and the
BRGi’s output divided by 2 becomes the transfer clock. In the UART mode, the BRGi is always valid, and
the BRGi’s output divided by 16 becomes the transfer clock.
The data written to the BRGi is written to both the timer and the reload register whichever transmission/
reception is in progress or not. Accordingly, writing to these register must be performed while transmission/
reception halts.
Figure 11.2.10 shows the structure of the UARTi baud rate register (BRGi); Figure 11.2.11 shows the block
diagram of transfer clock generating section.
<Clock synchronous serial I/O mode>
<UART mode>
UART0 baud rate register (BRG0) (Address
UART1 baud rate register (BRG1) (Address
UART2 baud rate register (BRG2) (Address
Note: Writing to this register must be performed while the transmission/reception halts.
7 to 0
f
f
Bit
EXT
EXT
f
f
Use the MOVM (MOVMB) or STA (STAB, STAD) instruction for writing to this register.
i
i
Any value in the range from “00
Assuming that the set value = n, BRGi divides the count source frequency by (n + 1).
BRGi
f
f
i
EXT
: Clock selected by BRG count source select bits (f
: Clock input to CLK
BRGi
1/2
7905 Group User’s Manual Rev.1.0
16
i
” to “FF
pin (external clock)
1/16
1/16
Function
31
39
B1
16
16
16
” can be set.
16
)
)
)
Transmit control circuit
Receive control circuit
Transmit control circuit
Receive control circuit
2
, f
16
, f
64
, or f
Transfer clock for transmit operation
Transfer clock for receive operation
Transfer clock for transmit operation
Transfer clock for receive operation
512
b7
)
16
Undefined
At reset
” to “FF
16
R/W
WO
”), the BRGi
b0