m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 94

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

below.
And then, the interrupt processing starts from the cycle just after completion of the instruction execution
which was executed at acceptance of the interrupt request. Figure 6.7.1 shows the sequence from occurrence
of an interrupt request until execution of the interrupt routine. After execution of an instruction at acceptance
of the interrupt request is completed, an INTACK (Interrupt Acknowledge) sequence is executed, and a
branch is made to the start address of the interrupt routine allocated in addresses 0
timing. After the INTACK sequence is completed, the instruction execution starts from the start address of
the interrupt routine.
6.7 Sequence from acceptance of interrupt request until execution of
The sequence from acceptance of an interrupt request until execution of the interrupt routine is described
When an interrupt request is accepted, the interrupt request bit of the accepted interrupt is cleared to “0.”
In the INTACK sequence, the following are automatically performed in ascending sequence from
Performing the INTACK sequence requires at least 15 cycles of f
Fig. 6.7.1 Sequence from occurrence of interrupt request until execution of interrupt routine
The contents of the program bank register (PG) just before performing the INTACK sequence are pushed
The contents of the program counter (PC) just before performing the INTACK sequence are pushed onto
The interrupt priority level of the accepted interrupt is set into the processor interrupt priority level (IPL).
The contents of the program bank register (PG) are cleared to “00
The contents of the processor status register (PS) just before performing the INTACK sequence is
The interrupt disable flag (I) is set to “1.”
onto stack.
stack.
pushed onto stack.
vector address are set into the program counter (PC).
6.7 Sequence from acceptance of interrupt request until execution of interrupt routine
interrupt routine
Interrupt request occurs.
Time from occurrence of an interrupt request until comparison of an instruction execution which
Time from execution start of an instruction next to
Time required to perform the INTACK sequence (15 cycles of
is in progress at that time.
which was in progress at detection completed.
Instruction
1
Interrupt request is accepted.
Instruction
@
2
Interrupt response time
7905 Group User’s Manual Rev.1.0
INTACK sequence
until completion of execution of the instruction
sys
Instructions in interrupt routine
@
. Figure 6.7.2 shows the INTACK sequence
@ : Interrupt priority level detection time
at minimum)
16
,” and the contents of the interrupt
INTERRUPTS
16
to FFFF
Time
16
.
to
6-13
.