m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 447

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

APPENDIX
Appendix 2. Control registers
20-16
UART0 transmit/receive control register 0 (Address
UART1 transmit/receive control register 0 (Address
UART2 transmit/receive control register 0 (Address
Notes 1: Valid when the CTS/RTS enable bit (bit 4) is “0” and CTS
UART0 transmit/receive control register 1 (Address 35
UART1 transmit/receive control register 1 (Address 3D
UART2 transmit/receive control register 1 (Address B5
Note: Bits 5 to 7 are invalid in the clock synchronous serial I/O mode.
Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
2: Fix these bits to “0” in the UART mode or when serial I/O is disabled.
BRG count source select bits
CTS/RTS function select bit
Transmit register empty flag
CTS/RTS enable bit
UARTi receive interrupt mode
select bit
CLK polarity select bit
(This bit is used in the clock
synchronous serial I/O mode.)
Transfer format select bit
(This bit is used in the clock
synchronous serial I/O mode.)
Transmit enable bit
Transmit buffer empty flag
Receive enable bit
Receive complete flag
Overrun error flag
Framing error flag
(Valid in UART mode)
Parity error flag
(Valid in UART mode)
Error sum flag
(Valid in UART mode)
Bit name
Bit name
(Note 1)
(Note 2)
(Note 2)
(Note)
(Note)
(Note)
7905 Group User’s Manual Rev.1.0
b1 b0
0 0 : Clock f
0 1 : Clock f
1 0 : Clock f
1 1 : Clock f
0 : The CTS function is selected.
1 : The RTS function is selected.
0 : Data is present in the transmit register.
1 : No data is present in the transmit register.
0 : The CTS/RTS function is enabled.
1 : The CTS/RTS function is disabled.
0 : Reception interrupt
1 : Reception error interrupt
0 : At the falling edge of the transfer clock, transmit
1 : At the falling edge of the transfer clock, transmit
0 : LSB (Least Significant Bit) first
1 : MSB (Most Significant Bit) first
0 : Transmission disabled
1 : Transmission enabled
0 : Data is present in the transmit buffer register.
1 : No data is present in the transmit buffer register.
0 : Reception disabled
1 : Reception enabled
0 : No data is present in the receive buffer register.
1 : Data is present in the receive buffer register.
0 : No overrun error
1 : Overrun error detected
0 : No framing error
1 : Framing error detected
0 : No parity error
1 : Parity error detected
0 : No error
1 : Error detected
(Transmission is in progress.)
(Transmission is completed.)
data is output; at the rising edge of the transfer
clock, receive data is input.
When not in transferring, pin CLKi’s level is “H.”
data is output; at the falling edge of the transfer
clock, receive data is input.
When not in transferring, pin CLKi’s level is “L.”
2
16
64
512
34
3C
B4
i
/RTS
16
16
16
16
16
16
)
)
)
)
)
)
i
separate select bit (bit 0, 1 or 4 at address AC
Function
Function
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
At reset
At reset
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
16
) is “0.”
R/W
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
Reference
Reference
11-7
11-9