m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 470

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

Notes 1: In order to set this bit to “1,” write “0” followed with “1” successively; while in order to clear this bit “0,” write “0.”
Flash memory control register
D-A control register (Address 96
Notes 1: Pin DA
D-A register i (i = 0 and 1) (Addresses 98
Note: When not using the D-A converter, be sure to clear the contents of these bits to “00
7 to 2
7 to 0
7, 6
Bit
Bit
Bit
0
1
0
1
2
3
4
5
2: Writing to this bit must be performed in an area other than the internal flash memory.
3: This bit is valid when the CPU reprogramming mode select bit (bit 1) = “1”: on the other hand, when the CPU
4: After writing of “1” to this bit, be sure to confirm the RY/BY status bit (bit 0) becomes “1”; and then, write “0” to this bit.
5: When MD1 = Vss level, this bit is invalid. (It may be either “0” or “1.”)
2: When not using the D-A converter, be sure to clear this bit to “0.”
output is enabled.), however, the corresponding pin cannot function as any other multiplexed input/output pin (including a
programmable I/O port pin).
reprogramming mode select bit = “0,” be sure to fix this bit to “0.” Rewriting of this bit must be performed with the CPU
reprogramming mode select bit = “1.”
D-A
D-A
Nothing is assigned.
RY/BY status bit
CPU reprogramming mode select bit
The value is “0” at reading.
Flash memory reset bit (Note 3)
The value is “0” at reading.
User ROM area select bit
(Valid in boot mode)
The value is “0” at reading.
Any value in the range from 00
value will be D-A converted and will be output.
0
1
i
is multiplexed with an analog input pin or serial input/output pin. When a D-A
output enable bit
output enable bit
Bit name
Bit name
(Note 5)
(Address 9E
16
)
0 : BUSY (Automatic programming or erase operation
1 : READY (Automatic programming or erase operation
0 : Flash memory CPU reprogramming mode is invalid.
1 : Flash memory CPU reprogramming mode is valid.
Writing “1” into this bit discontinues the access to the
internal flash memory. This causes the built-in flash
memory circuit being reset.
0 : Access to boot ROM area
1 : Access to user ROM area
0: Output is disabled.
1: Output is enabled. (Notes 1, 2)
0: Output is disabled.
1: Output is enabled. (Notes 1, 2)
16
16
7905 Group User’s Manual Rev.1.0
is active.)
has been completed.)
)
Function
through FF
16
and 99
16
16
can be set (Note), and this
)
Function
Function
16
.”
i
output enable bit = “1” (in other words,
Appendix 2. Control registers
b7
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
At reset
Undefined
At reset
At reset
0
0
1
0
0
0
0
0
0
0
APPENDIX
(Notes 1, 2)
(Note 4)
(Note 2)
R/W
RW
R/W
R/W
RW
RW
RW
RW
RW
RO
—
—
—
—
b0
Reference
Reference
Reference
19-10
19-11
13-3
13-3
20-39