m37905 Renesas Electronics Corporation., m37905 Datasheet - Page 301

• Manufacturer Part Number: m37905
• Description: Mitsubishi 16-bit Single-chip Microcomputer 7700 Family / 7900 Series
• Manufacturer: Renesas Electronics Corporation.

Fig. 11.4.8 Example of transmit timing when transfer data length = 8 bits (when parity enabled,
SERIAL I/O
11.4 Clock asynchronous serial I/O (UART) mode
Fig. 11.4.7 Example of transmit timing when transfer data length = 8 bits (when parity enabled,
11-46
Transmit enable bit
interrupt request bit
interrupt request bit
Transmit enable bit
Transmit register
Transmit buffer
Transmit register
UARTi transmit
Transfer clock
UARTi transmit
Transmit buffer
Transfer clock
empty flag
empty flag
empty flag
empty flag
1 stop bit selected, CTS function not selected)
1 stop bit and selecting CTS function selected)
T
CTS
TxD
ENDi
T
TxD
ENDi
i
The above timing diagram applies
when the following conditions are
satisfied:
i
The above timing diagram applies when
the following conditions are satisfied:
i
Parity enabled
1 stop bit
CTS function selected
Parity enabled
1 stop bit
CTS function not selected
Cleared to “0” when interrupt request is accepted or cleared to “0” by software.
Cleared to “0” when interrupt request is accepted or cleared to “0” by software.
ST
ST
D
D
0
0
Data is set in UARTi transmit buffer register.
D
Data is set in UARTi transmit buffer register.
D
1
Tc
1
Tc
D
D
2
2
D
D
3
3
7905 Group User’s Manual Rev.1.0
D
D
4
4
T
T
D
ENDi
ENDi
D
5
5
: Next transmit conditions are examined when this signal level
f
D
: Next transmit conditions are examined when this signal level
f
EXT
D
EXT
becomes “H.”
(T
Tc: 16 (n + 1)/f
6
becomes “H.”
(T
Tc = 16 (n + 1)/f
the external.)
the external.)
6
f
n: Value set in BRGi
f
n: Value set in BRGi
ENDi
i
: BRGi’s count source frequency (internal clock)
ENDi
i
: BRGi’s count source frequency (external clock)
: BRGi’s count source frequency (internal clock)
: BRGi’s count source frequency (external clock)
D
D
7
7
is an internal signal. Accordingly, it cannot be read from
is an internal signal. Accordingly, it cannot be read from
P SP
P
UARTi transmit register
UARTi transmit register
SP
i
or 16 (n + 1)/f
i
ST
or 16 (n + 1)/f
Stopped because CTS
D
0
ST
D
1
EXT
D
0
D
EXT
2
D
1
D
3
Stopped because transmit enable bit = “0”
D
2
UARTi transmit buffer register
D
UARTi transmit buffer register
4
D
3
D
i
= “H”
5
D
D
4
6
D
D
5
7
D
6
P SP
D
7
P SP
D
0
to D
D
0
ST: Start bit
ST: Stop bit
to D
P: Parity bit
7
Stopped because transmit
enable bit = “0”
: Transfer data
ST: Start bit
ST: Stop bit
ST
P: Parity bit
7
: Transfer data
D
0
ST
D
1
D
0
D
1