MPC8347 FREESCALE [Freescale Semiconductor, Inc], MPC8347 Datasheet - Page 31

• Manufacturer Part Number: MPC8347
• Description: Integrated Host Processor Hardware Specifications
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

8.2.3.2
Table 29
Figure 13
Freescale Semiconductor
At recommended operating conditions with LV
PMA_RX_CLK clock period
PMA_RX_CLK skew
RX_CLK duty cycle
RXD[7:0], RX_DV, RX_ER (RCG[9:0]) setup time to rising
PMA_RX_CLK
RXD[7:0], RX_DV, RX_ER (RCG[9:0]) hold time to rising
PMA_RX_CLK
RX_CLK clock rise time V
RX_CLK clock fall time V
Note:
1. The symbols for timing specifications follow the pattern of t
2. Setup and hold time of even numbered RCG are measured from the riding edge of PMA_RX_CLK1. Setup and hold times
and t
(TR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
the high (H) state or setup time. Also, t
(D) went invalid (X) relative to the t
is based on three letters representing the clock of a particular function. For example, the subscript of t
(T) receive (RX) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise) or F (fall). For
symbols representing skews, the subscript SK followed by the clock that is being skewed (TRX).
of odd-numbered RCG are measured from the riding edge of PMA_RX_CLK0.
(first two letters of functional block)(reference)(state)(signal)(state)
provides the TBI receive AC timing specifications.
shows the TBI receive AC timing diagram.
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 3
PMA_RX_CLK1
PMA_RX_CLK0
TBI Receive AC Timing Specifications
Parameter/Condition
RCG[9:0]
IH
IL
(max) to V
(min) to V
Table 29. TBI Receive AC Timing Specifications
TRX
IH
IL
Figure 13. TBI Receive AC Timing Diagram
(min)
(max)
DD
t
TRDXKH
clock reference (K) going to the high (H) state. In general, the clock reference symbol
SKTRX
t
TRXH
/ OV
t
TRDVKH
DD
symbolizes TBI receive timing (TR) with respect to the time data input signals
t
of 3.3 V ± 10%.
TRX
t
TRXH
Even RCG
for outputs. For example, t
(first two letters of functional block)(signal)(state) (reference)(state)
t
Symbol
t
t
TRXH
TRDVKH
TRDXKH
t
t
SKTRX
t
t
TRXR
TRXF
TRX
t
TRXF
/t
TRX
2
1
2
Odd RCG
t
TRDXKH
Ethernet: Three-Speed Ethernet, MII Management
Min
t
7.5
2.5
1.5
0.7
0.7
40
TRXR
t
TRDVKH
TRDVKH
t
TRDXKH
TRX
16.0
Typ
—
—
—
—
—
—
symbolizes TBI receive timing
clock reference (K) going to
TRX
Max
represents the TBI
8.5
2.4
2.4
60
—
—
for inputs
Unit
ns
ns
ns
ns
ns
ns
%
31