MPC8347 FREESCALE [Freescale Semiconductor, Inc], MPC8347 Datasheet - Page 40

• Manufacturer Part Number: MPC8347
• Description: Integrated Host Processor Hardware Specifications
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Local Bus
Figure 18
40
Local bus cycle time
Input setup to local bus clock
Input hold from local bus clock
LALE output fall to LAD output transition (LATCH hold time)
LALE output fall to LAD output transition (LATCH hold time)
LALE output fall to LAD output transition (LATCH hold time)
Local bus clock to output valid
Local bus clock to output high impedance for LAD/LDP
Notes:
1. The symbols for timing specifications follow the pattern of t
2. All timings are in reference to the falling edge of LCLK0 (for all outputs and for LGTA and LUPWAIT inputs) or the rising edge
3. All signals are measured from OV
4. Input timings are measured at the pin.
5.t
6.t
7.t
8. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
9. DLL bypass mode is not recommended for use at frequencies above 66 MHz.
LBOTOT1
LBOTOT2
LBOTOT3
and t
(LB) for the input (I) to go invalid (X) with respect to the time the t
one(1). Also, t
(O) going invalid (X) or output hold time.
of LCLK0 (for all other inputs).
signaling levels.
the load on the LAD output pins.
load on the LAD output pins.the
output pins.
through the component pin is less than or equal to the leakage current specification.
(First two letters of functional block)(reference)(state)(signal)(state)
should be used when RCWH[LALE] is not set and when the load on the LALE output pin is at least 10 pF less than
should be used when RCWH[LALE] is set and when the load on the LALE output pin is at least 10 pF less than the
should be used when RCWH[LALE] is set and when the load on the LALE output pin equals to the load on the LAD
provides the AC test load for the local bus.
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 3
LBKHOX
symbolizes local bus timing (LB) for the t
Table 38. Local Bus General Timing Parameters—DLL Bypass
Output
Parameter
DD
/2 of the rising/falling edge of LCLK0 to 0.4 × OV
Figure 18. Local Bus C Test Load
Z
0
= 50 Ω
(First two letters of functional block)(signal)(state) (reference)(state)
for outputs. For example, t
LBK
LBK
clock reference (K) to go high (H), with respect to the output
Symbol
t
t
t
t
t
clock reference (K) goes high (H), in this case for clock
LBOTOT1
LBOTOT2
LBOTOT3
t
t
LBKHOV
LBKHOZ
LBIVKH
LBIXKH
t
LBK
R
L
1
= 50 Ω
Min
1.0
1.5
2.5
15
—
—
7
3
DD
LBIXKH1
of the signal in question for 3.3 V
OV
DD
Max
symbolizes local bus timing
/2
—
—
—
—
—
—
3
4
Freescale Semiconductor
Unit
ns
ns
ns
ns
ns
ns
ns
ns
for inputs
Notes
3, 4
3, 4
2
5
6
7
3