ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 38

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7854/ADE7858/ADE7868/ADE7878
allows a small time delay or time advance to be introduced into
the signal processing chain to compensate for the small phase
errors.
The phase calibration registers (APHCAL, BPHCAL, and
CPHCAL) are 10-bit registers that can vary the time advance
in the voltage channel signal path from −374.0 μs to +61.5 μs.
Negative values written to the PHCAL registers represent a time
advance whereas positive values represent a time delay. One LSB
is equivalent to 0.976 μs of time delay or time advance (clock
rate of 1.024 MHz). With a line frequency of 60 Hz, this gives
a phase resolution of 0.0211° (360° × 60 Hz/1.024 MHz) at the
fundamental. This corresponds to a total correction range of
−8.079° to +1.329° at 60 Hz. At 50 Hz, the correction range is
−6.732° to +1.107° and the resolution is 0.0176° (360° × 50 Hz/
1.024 MHz).
Given a phase error of x degrees, measured using the phase
voltage as the reference, the corresponding LSBs are computed
dividing x by the phase resolution (0.0211°/LSB for 60 Hz and
0.0176°/LSB for 50 Hz). Results between −383 and +63 only are
acceptable; numbers outside this range are not accepted. If the
result is negative, the absolute value is written into the PHCAL
registers. If the result is positive, 512 is added to the result
before writing it into xPHCAL.
VA
IA
VA
IA
VAP
IAN
IAP
VN
50Hz
1°
PGA1
PGA3
Figure 53. Phase Calibration on Voltage Channels
Rev. D | Page 38 of 96
ADC
ADC
IA
VA
CALIBRATION
APHCAL = 57
PHASE
Figure 53 illustrates how the phase compensation is used to remove
x = −1° phase lead in IA of the current channel from the external
current transducer (equivalent of 55.5 μs for 50 Hz systems). To
cancel the lead (1°) in the current channel of Phase A, a phase
lead must be introduced into the corresponding voltage channel.
Using Equation 8, APHCAL is 57 least significant bits, rounded
up from 56.8. The phase lead is achieved by introducing a time
delay of 55.73 μs into the Phase A current.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE785xx work on 32-, 16-, or 8-bit words.
As shown in Figure 52, APHCAL, BPHCAL, and CPHCAL
10-bit registers are accessed as 16-bit registers with the six MSBs
padded with 0s.
APHCAL ,
BPHCAL , or
CPHCAL =
Figure 52. xPHCAL Registers Communicated As 16-Bit Registers
15
0000 00
PHASE COMPENSATION
ACHIEVED DELAYING
IA BY 56µs
10 9
⎧
⎪
⎪
⎨
⎪
⎪
⎩
phase
phase
_
_
resolution
resolution
x
x
xPHCAL
+
,
x
512
≤
0
,
x
>
0
0
⎫
⎪
⎪
⎬
⎪
⎪
⎭
(8)