ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 45

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

If the phase currents and voltages contain only the fundamental
component, are in phase (that is φ
to full-scale ADC inputs, then multiplying them results in an
instantaneous power signal that has a dc component, V
and a sinusoidal component, V
the corresponding waveforms.
Because LPF2 does not have an ideal brick wall frequency
response (see Figure 61), the active power signal has some
ripple due to the instantaneous power signal. This ripple is
sinusoidal and has a frequency equal to twice the line frequency.
Because the ripple is sinusoidal in nature, it is removed when
the active power signal is integrated over time to calculate the
energy.
The ADE7854/ADE7858/ADE7868/ADE7878 store the
instantaneous total phase active powers into the AWATT,
BWATT, and CWATT registers. Their expression is
where:
U
the ADC inputs are at full scale.
V rms × I rms
0x1FF6A6B =
FS
0x3FED4D6
0x000 0000
67,032,278
33,516,139
, I
xWATT
FS
–10
–15
–20
–25
–5
are the rms values of the phase voltage and current when
0
0.1
INSTANTANEOUS
POWER SIGNAL
Figure 61. Frequency Response of the LPF Used
i(t) = √2 × I rms × sin(ωt)
to Filter Instantaneous Power in Each Phase
=
v(t) = √2 × V rms × sin(ωt)
∑
k
∞
=
Figure 60. Active Power Calculation
1
U
U
FS
k
×
I
I
FREQUENCY (Hz)
FS
k
×
p(t)= V rms × I rms – V rms × I rms × cos(2ωt)
cos( φ
1
× I
1
1
= γ
1
cos(2ωt); Figure 60 shows
k
– γ
1
= 0), and they correspond
k
) × PMAX ×
3
INSTANTANEOUS
ACTIVE POWER
SIGNAL: V rms × I rms
2
1
1
10
× I
4
1
,
(20)
Rev. D | Page 45 of 96
PMAX = 33,516,139; it is the instantaneous power computed
when the ADC inputs are at full scale and in phase.
The xWATT[23:0] waveform registers can be accessed using
various serial ports. Refer to the Waveform Sampling Mode
section for more details.
Fundamental Active Power Calculation—ADE7878 Only
The ADE7878 computes the fundamental active power using
a proprietary algorithm that requires some initializations function
of the frequency of the network and its nominal voltage measured
in the voltage channel. Bit 14 (SELFREQ) in the COMPMODE
register must be set according to the frequency of the network in
which the ADE7878 is connected. If the network frequency is
50 Hz, clear this bit to 0 (the default value). If the network fre-
quency is 60 Hz, set this bit to 1. In addition, initialize the VLEVEL
24-bit signed register with a positive value based on the
following expression:
where:
U
are at full scale.
U
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7878 work on 32-, 16-, or 8-bit words
and the DSP works on 28 bits. Similar to the registers presented
in Figure 33, the VLEVEL 24-bit signed register is accessed as a
32-bit register with four most significant bits padded with 0s
and sign extended to 28 bits.
Table 14 presents the settling time for the fundamental active
power measurement.
Table 14. Settling Time for Fundamental Active Power
63% Full Scale
375 ms
Active Power Gain Calibration
Note that the average active power result from the LPF2 output
in each phase can be scaled by ±100% by writing to the phase’s
watt gain 24-bit register (AWGAIN, BWGAIN, CWGAIN,
AFWGAIN, BFWGAIN, or CFWGAIN). The xWGAIN
registers are placed in each phase of the total active power
datapath, and the xFWGAIN (available for the ADE7878 only)
registers are placed in each phase of the fundamental active
power datapath. The watt gain registers are twos complement,
signed registers and have a resolution of 2
describes mathematically the function of the watt gain registers.
FS
n
is the rms nominal value of the phase voltage.
ADE7854/ADE7858/ADE7868/ADE7878
is the rms value of the phase voltages when the ADC inputs
VLEVEL
Average
LPF
2
Output
Power
=
U
U
FS
n
×
Data
×
⎛
⎜
⎝
1
491
+
Input Signals
,
=
Watt
520
Gain
100% Full Scale
875 ms
2
23
Re
gister
−23
/LSB. Equation 22
⎞
⎟
⎠
(21)
(22)