ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 46

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7854/ADE7858/ADE7868/ADE7878
The output is scaled by −50% by writing 0xC00000 to the watt
gain registers, and it is increased by +50% by writing 0x400000
to them. These registers are used to calibrate the active power
(or energy) calculation in the ADE7854/ADE7858/ADE7868/
ADE7878 for each phase.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7854/ADE7858/ADE7868/ADE7878
work on 32-, 16-, or 8-bit words, and the DSP works on 28 bits.
Similar to registers presented in Figure 33, AWGAIN, BWGAIN,
CWGAIN, AFWGAIN, BFWGAIN, and CFWGAIN 24-bit
signed registers are accessed as 32-bit registers with the four
MSBs padded with 0s and sign extended to 28 bits.
Active Power Offset Calibration
The ADE7854/ADE7858/ADE7868/ADE7878 incorporate a
watt offset 24-bit register on each phase and on each active
power. The AWATTOS, BWATTOS, and CWATTOS registers
compensate the offsets in the total active power calculations,
and the AFWATTOS, BFWATTOS, and CFWATTOS registers
compensate offsets in the fundamental active power calculations.
These are signed twos complement, 24-bit registers that are
used to remove offsets in the active power calculations. An
offset can exist in the power calculation due to crosstalk between
channels on the PCB or in the chip itself. One LSB in the active
power offset register is equivalent to 1 LSB in the active power
multiplier output. With full-scale current and voltage inputs,
the LPF2 output is PMAX = 33,516,139. At −80 dB down from
the full scale (active power scaled down 10
the active power offset register represents 0.0298% of PMAX.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7854/ADE7858/ADE7868/ADE7878
work on 32-, 16-, or 8-bit words and the DSP works on 28 bits.
Similar to registers presented in Figure 33, the AWATTOS,
BWATTOS, CWATTOS, AFWATTOS, BFWATTOS, and
CFWATTOS 24-bit signed registers are accessed as 32-bit
registers with the four MSBs padded with 0s and sign extended
to 28 bits.
Sign of Active Power Calculation
The average active power is a signed calculation. If the phase
difference between the current and voltage waveform is more
than 90°, the average power becomes negative. Negative power
indicates that energy is being injected back on the grid. The
ADE78xx has sign detection circuitry for total active power
calculations. It can monitor the total active powers or the
fundamental active powers. As described in the Active Energy
4
times), one LSB of
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Calculation section, the active energy accumulation is performed
in two stages. Every time a sign change is detected in the energy
accumulation at the end of the first stage, that is, after the energy
accumulated into the internal accumulator reaches the WTHR
register threshold, a dedicated interrupt is triggered. The sign of
each phase active power can be read in the PHSIGN register.
Bit 6 (REVAPSEL) in the ACCMODE register sets the type of
active power being monitored. When REVAPSEL is 0, the
default value, the total active power is monitored. When
REVAPSEL is 1, the fundamental active power is monitored.
Bits[8:6] (REVAPC, REVAPB, and REVAPA, respectively) in the
STATUS0 register are set when a sign change occurs in the
power selected by Bit 6 (REVAPSEL) in the ACCMODE
register.
Bits[2:0] (CWSIGN, BWSIGN, and AWSIGN, respectively) in
the PHSIGN register are set simultaneously with the REVAPC,
REVAPB, and REVAPA bits. They indicate the sign of the power.
When they are 0, the corresponding power is positive. When
they are 1, the corresponding power is negative.
Bit REVAPx of STATUS0 and Bit xWSIGN in the PHSIGN
register refer to the total active power of Phase x, the power type
being selected by Bit 6 (REVAPSEL) in the ACCMODE register.
Interrupts attached to Bits[8:6] (REVAPC, REVAPB, and REVAPA,
respectively) in the STATUS0 register can be enabled by setting
Bits[8:6] in the MASK0 register. If enabled, the IRQ0 pin is set
low, and the status bit is set to 1 whenever a change of sign occurs.
To find the phase that triggered the interrupt, the PHSIGN register
is read immediately after reading the STATUS0 register. Next, the
status bit is cleared and the IRQ0 pin is returned to high by writing
to the STATUS0 register with the corresponding bit set to 1.
Active Energy Calculation
As previously stated, power is defined as the rate of energy flow.
This relationship can be expressed mathematically as
Conversely, energy is given as the integral of power, as follows:
Total and fundamental active energy accumulations are always
signed operations. Negative energy is subtracted from the active
energy contents.
Power =
Energy
=
dEnergy
∫
p
dt
( )
t
dt
(23)
(24)