ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 89

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit
Location
8
15:9
Table 48. CONFIG Register (Address 0xE618)
Bit
Location
0
2:1
3
4
5
6
7
9:8
11:10
13:12
15:14
SUM3SIGN
Reserved
INTEN
Reserved
SWAP
MOD1SHORT
MOD2SHORT
HSDCEN
SWRST
VTOIA[1:0]
VTOIB[1:0]
VTOIC[1:0]
Reserved
Bit Mnemonic
Bit Mnemonic
Default Value
0
000 0000
Default Value
0
00
0
0
0
0
0
00
00
00
0
0: if the sum of all phase powers in the CF3 datapath is positive.
Reserved. These bits are always 0.
Reserved. These bits do not manage any functionality.
When this bit is set to 1, a software reset is initiated.
Reserved. These bits do not manage any functionality.
Description
1: if the sum of all phase powers in the CF3 datapath is negative. Phase powers in the CF3
datapath are identified by Bits[8:6] (TERMSEL3[x]) of the COMPMODE register and by
Bits[8:6] (CF3SEL[x]) of the CFMODE register.
Description
Integrator enable. When this bit is set to 1, the internal digital integrator is enabled for use in
meters utilizing Rogowski coils on all 3-phase and neutral current inputs.
When this bit is cleared to 0, the internal digital integrator is disabled.
When this bit is set to 1, the voltage channel outputs are swapped with the current channel
outputs. Thus, the current channel information is present in the voltage channel registers
and vice versa.
When this bit is set to 1, the voltage channel ADCs behave as if the voltage inputs were put
to ground.
When this bit is set to 1, the current channel ADCs behave as if the voltage inputs were put
to ground.
When this bit is set to 1, the HSDC serial port is enabled and HSCLK functionality is chosen at
CF3/HSCLK pin.
When this bit is cleared to 0, HSDC is disabled and CF3 functionality is chosen at CF3/HSCLK pin.
These bits decide what phase voltage is considered together with Phase A current in the
power path.
00 = Phase A voltage.
01 = Phase B voltage.
10 = Phase C voltage.
11 = reserved. When set, the ADE7854/ADE7858/ADE7868/ADE7878 behave like VTOIA[1:0] = 00.
These bits decide what phase voltage is considered together with Phase B current in the
power path.
00 = Phase B voltage.
01 = Phase C voltage.
10 = Phase A voltage.
11 = reserved. When set, the ADE7854/ADE7858/ADE7868/ADE7878 behave like VTOIB[1:0] = 00.
These bits decide what phase voltage is considered together with Phase C current in the
power path.
00 = Phase C voltage.
01 = Phase A voltage.
10 = Phase B voltage.
11 = reserved. When set, the ADE7854/ADE7858/ADE7868/ADE7878 behave like VTOIC[1:0] = 00.
Rev. D| Page 89 of 96
ADE7854/ADE7858/ADE7868/ADE7878