TV04A640JB-G Comchip Technology, TV04A640JB-G Datasheet - Page 18

TVS 400W 64V BIDIRECT SMA

TV04A640JB-G

Manufacturer Part Number
TV04A640JB-G
Description
TVS 400W 64V BIDIRECT SMA
Manufacturer
Comchip Technology
Datasheets

Specifications of TV04A640JB-G

Voltage - Reverse Standoff (typ)
64V
Voltage - Breakdown
71.1V
Power (watts)
400W
Polarization
Bidirectional
Mounting Type
Surface Mount
Package / Case
DO-214AC, SMA
Channels
1 Channel
Clamping Voltage
103 V
Operating Voltage
3.5 V
Breakdown Voltage
71.1 V
Peak Surge Current
40 A
Peak Pulse Power Dissipation
400 W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9. Parallel Mode (for 16-pin SO package only)
10. Accelerated Programming Operation
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The parallel mode provides 8 bits of input/output to increase factory production throughput at the customer
manufacturing facilities. This function is recommended for increasing production throughput. Entering Parallel
mode requires issuing the Enter Parallel Mode command (55h). After writing the Parallel Mode Entry
command and pulling CS# high, the available commands are Read, Write Enable (WREN), Write Disable
(WRDI), Page Program (PP), Sector Erase (SE), Bulk Erase (BE), Write Status Register (WRSR), Read
Status Register (RDSR), Release from Deep Power Down/Release from Deep Power Down and Read
Electronic Signature (RES), Deep Power Down (DP), Read Identification (RDID) and Read ID (READ_ID).
The flash memory will remain in Parallel mode until either the Parallel Mode Exit command (45h) is issued, or
until a power-down / power-up sequence has been completed, after which the flash memory will exit parallel
mode automatically and switch back to serial mode (no power-down will be necessary to switch back to serial
mode if the Parallel Mode Exit command is issued).
In parallel mode, the maximum SCK clock frequency is limited to 6 MHz for Read Data Bytes and 10 MHz for
other operations. PO[6-0] can be left unconnected if the Parallel Mode functions are not needed. Fast-Read
command is not applicable in Parallel mode.
The device offers accelerated program operations through the ACC function. This function is primarily
intended to allow faster manufacturing throughput at the factory. If the system asserts V
device uses the higher voltage on the pin to reduce the time required for program operations. Removing V
from the WP#/ACC pin returns the device to normal operation. Note that the WP#/ACC pin must not be at
V
ACC pin must not be left floating or unconnected; inconsistent behavior of the device may result.
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for operations other than accelerated programming, or device damage may result. In addition, the WP#/
S25FL128P
D a t a
S h e e t
S25FL128P_00_08 September 8, 2009
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on this pin, the
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