ST72F521M9T6 STMicroelectronics, ST72F521M9T6 Datasheet - Page 142

• Manufacturer Part Number: ST72F521M9T6
• Description: IC MCU 8BIT 60K FLASH 80-TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F521M9T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LINSCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Processor Series: ST72F5x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 2048 B
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 3.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• For Use With: 497-6453 - BOARD EVAL BASED ON ST7LNBX497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-8244; ST72F521M9T6

ST72F521, ST72521B
CONTROLLER AREA NETWORK (Cont’d)
FILTER HIGH REGISTERS (FHRx)
Read/Write
Reset Value: Undefined
FIL[11:3] are the most significant 8 bits of a 12-bit
message filter. The acceptance filter is compared
bit by bit with the identifier and the RTR bit of the
incoming message. If there is a match for the set
of bits specified by the acceptance mask then the
message is stored in a receive buffer.
FILTER LOW REGISTERS (FLRx)
Read/Write
Reset Value: Undefined
FIL[3:0] are the least significant 4 bits of a 12-bit
message filter.
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FIL11
FIL3
7
7
FIL10
FIL2
FIL9
FIL1
FIL8
FIL0
FIL7
0
FIL6
0
FIL5
0
FlL4
0
0
0
MASK HIGH REGISTERS (MHRx)
Read/Write
Reset Value: Undefined
MSK[11:3] are the most significant 8 bits of a 12-
bit message mask. The acceptance mask defines
which bits of the acceptance filter should match
the identifier and the RTR bit of the incoming mes-
sage.
MSK
MSK
MASK LOW REGISTERS (MLRx)
Read/Write
Reset Value: Undefined
MSK[3:0] are the least significant 4 bits of a 12-bit
message mask.
MSK1
MSK3 MSK2 MSK1 MSK0
7
1
7
i
i
= 0: don’t care.
= 1: match required.
MSK1
0
MSK9 MSK8 MSK7 MSK6 MSK5 MSK4
0
0
0
0
0
0