ST72F521M9T6 STMicroelectronics, ST72F521M9T6 Datasheet - Page 164

IC MCU 8BIT 60K FLASH 80-TQFP

ST72F521M9T6

Manufacturer Part Number
ST72F521M9T6
Description
IC MCU 8BIT 60K FLASH 80-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F521M9T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
64
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Processor Series
ST72F5x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
2048 B
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
3.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
497-6453 - BOARD EVAL BASED ON ST7LNBX497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-8244
ST72F521M9T6

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ST72F521, ST72521B
INSTRUCTION SET OVERVIEW (Cont’d)
164/215
Mnemo
JRULE
LD
MUL
NEG
NOP
OR
POP
PUSH
RCF
RET
RIM
RLC
RRC
RSP
SBC
SCF
SIM
SLA
SLL
SRL
SRA
SUB
SWAP
TNZ
TRAP
WFI
XOR
Jump if (C + Z = 1)
Load
Multiply
Negate (2's compl)
No Operation
OR operation
Pop from the Stack
Push onto the Stack
Reset carry flag
Subroutine Return
Enable Interrupts
Rotate left true C
Rotate right true C
Reset Stack Pointer
Substract with Carry
Set carry flag
Disable Interrupts
Shift left Arithmetic
Shift left Logic
Shift right Logic
Shift right Arithmetic
Substraction
SWAP nibbles
Test for Neg & Zero
S/W trap
Wait for Interrupt
Exclusive OR
Description
Unsigned <=
dst <= src
X,A = X * A
neg $10
A = A + M
pop reg
pop CC
push Y
C = 0
I1:0 = 10 (level 0)
C <= A <= C
C => A => C
S = Max allowed
A = A - M - C
C = 1
I1:0 = 11 (level 3)
C <= A <= 0
C <= A <= 0
0 => A => C
A7 => A => C
A = A - M
A7-A4 <=> A3-A0
tnz lbl1
S/W interrupt
A = A XOR M
Function/Example
reg, M
reg, M
reg
CC
M
reg, M
reg, M
reg, M
A
reg, M
A
A, X, Y
A
reg, M
A
reg, M
reg, M
Dst
M, reg
X, Y, A
M
M
M
reg, CC
M
M
M
Src
I1
I1
1
1
1
1
H
H
0
I0
I0
0
1
1
0
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
0
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
C
C
C
C
C
C
C
C
C
C
C
0
0
1

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