ST92F150CV1TB STMicroelectronics, ST92F150CV1TB Datasheet - Page 116

• Manufacturer Part Number: ST92F150CV1TB
• Description: MCU 8BIT 128K FLASH 100TQFP
• Manufacturer: STMicroelectronics
• Series: ST9r

Specifications of ST92F150CV1TB

• Core Processor: ST9
• Core Size: 8/16-Bit
• Speed: 24MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SCI, SPI
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ST92F15x
• Core: ST9
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST92F150-EPB
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4883

ST92F124/F150/F250 - INTERRUPTS
WAKE-UP / INTERRUPT LINES MANAGEMENT UNIT (Cont’d)
5.12.3.4 NMI Pin Management
On the CPU side, if TLTEV=1 (Top Level Trigger
Event, bit 3 of register R246, page 0) then a rising
edge on the NMI pin will set the TLIP bit (Top Level
Interrupt Pending bit, R230.6). At this point an in-
terrupt request to the CPU is given either if TL-
NM=1 (Top Level Not Maskable bit, R247.7 - once
set it can only be cleared by RESET) or if TLI=1
and IEN=1 (bits R230.5, R230.4).
Assuming that the application uses a non-maska-
ble Top Level Interrupt (TLNM=1): in this case,
whenever a rising edge occurs on the NMI pin, the
related service routine will be executed. To service
further Top Level Interrupt Requests, it is neces-
sary to generate a new rising edge on the external
NMI pin.
The following summarizes some typical cases:
– If the ST9 is in STOP mode and a rising edge on
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9
the NMI pin occurs, the ST9 will exit STOP
mode and the NMI service routine will be exe-
cuted.
– If the ST9 is in Run mode and a rising edge oc-
– If the ST9 is in run mode and a rising edge on
– If the ST9 is in run mode and the NMI pin is high:
curs on the NMI pin: the NMI service routine is
executed and then the ST9 restarts the execu-
tion of the main program. Now, suppose that
the user wants to enter STOP mode with NMI
still at 1. The ST9 will not enter STOP mode
and it will not execute an NMI routine be-
cause there were no transitions on the exter-
nal NMI line.
NMI pin occurs during the STOP bit setting se-
quence: the NMI interrupt will be acknowledged
and the ST9 will not enter STOP mode. At the
end of the NMI routine, the user must re-enter
the sequence: if NMI is still high at the end of the
sequence, the ST9 can not enter STOP mode
(see previous case).
if NMI is forced low just before the third write in-
struction of the STOP bit setting sequence then
the ST9 will enter STOP mode.