HD64F3664FPV Renesas Electronics America, HD64F3664FPV Datasheet - Page 23

• Manufacturer Part Number: HD64F3664FPV
• Description: IC H8/3664 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3664FPV

• Core Size: 16-Bit
• Program Memory Size: 32KB (32K x 8)
• Oscillator Type: External
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 29
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• No. Of I/o's: 29
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 15.14 Sample Flowchart for Master Receive Mode ........................................................ 249
Figure 15.15 Sample Flowchart for Slave Receive Mode .......................................................... 250
Figure 15.16 Sample Flowchart for Slave Transmit Mode......................................................... 251
Figure 15.17 Flowchart and Timing of Start Condition Instruction Issuance
for Retransmission ................................................................................................. 256
Section 16 A/D Converter
Figure 16.1 Block Diagram of A/D Converter ........................................................................... 258
Figure 16.2 A/D Conversion Timing .......................................................................................... 264
Figure 16.3 External Trigger Input Timing ................................................................................ 265
Figure 16.4 A/D Conversion Accuracy Definitions (1) .............................................................. 266
Figure 16.5 A/D Conversion Accuracy Definitions (2) .............................................................. 267
Figure 16.6 Analog Input Circuit Example................................................................................. 268
Section 17 EEPROM
Figure 17.1 Block Diagram of EEPROM ................................................................................... 270
Figure 17.2 EEPROM Bus Format and Bus Timing .................................................................. 272
Figure 17.3 Byte Write Operation .............................................................................................. 274
Figure 17.4 Page Write Operation .............................................................................................. 275
Figure 17.5 Current Address Read Operation............................................................................. 276
Figure 17.6 Random Address Read Operation ........................................................................... 277
Figure 17.7 Sequential Read Operation (when current address read is used)............................. 278
Section 18 Power Supply Circuit
Figure 18.1 Power Supply Connection when Internal Step-Down Circuit is Used .................... 279
Figure 18.2 Power Supply Connection when Internal Step-Down Circuit is Not Used ............. 280
Section 20 Electrical Characteristics
Figure 20.1 System Clock Input Timing..................................................................................... 320
Figure 20.2 RES Low Width Timing.......................................................................................... 321
Figure 20.3 Input Timing............................................................................................................ 321
2
Figure 20.4 I
C Bus Interface Input/Output Timing ................................................................... 321
Figure 20.5 SCK3 Input Clock Timing....................................................................................... 322
Figure 20.6 SCI3 Input/Output Timing in Clocked Synchronous Mode .................................... 322
Figure 20.7 EEPROM Bus Timing............................................................................................. 323
Figure 20.8 Output Load Circuit................................................................................................. 323
Appendix B I/O Port Block Diagrams
Figure B.1 Port 1 Block Diagram (P17) ..................................................................................... 355
Figure B.2 Port 1 Block Diagram (P16 to P14) .......................................................................... 356
Figure B.3 Port 1 Block Diagram (P12, P11) ............................................................................. 357
Figure B.4 Port 1 Block Diagram (P10) ..................................................................................... 358
Figure B.5 Port 2 Block Diagram (P22) ..................................................................................... 359
Figure B.6 Port 2 Block Diagram (P21) ..................................................................................... 360
Figure B.7 Port 2 Block Diagram (P20) ..................................................................................... 361
Figure B.8 Port 5 Block Diagram (P57, P56) ............................................................................. 362
Rev. 5.00, 03/04, page xxiii of xxviii