HD64F3664FPV Renesas Electronics America, HD64F3664FPV Datasheet - Page 72

• Manufacturer Part Number: HD64F3664FPV
• Description: IC H8/3664 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3664FPV

• Core Size: 16-Bit
• Program Memory Size: 32KB (32K x 8)
• Oscillator Type: External
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 29
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• No. Of I/o's: 29
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Prior to executing BSET
BSET instruction executed
After executing BSET
Bit Manipulation in a Register Containing a Write-Only Bit
Example 3: BCLR instruction executed designating port 5 control register PCR5
P57 and P56 are input pins, with a low-level signal input at P57 and a high-level signal input at
P56. P55 to P50 are output pins that output low-level signals. An example of setting the P50 pin as
an input pin by the BCLR instruction is shown below. It is assumed that a high-level signal will be
input to this input pin.
Rev. 5.00, 03/04, page 44 of 388
Input/output
Pin state
PCR5
PDR5
RAM0
Input/output
Pin state
PCR5
PDR5
RAM0
MOV.B
MOV.B
MOV.B
BSET
MOV.B
MOV.B
#80,
R0L,
R0L,
#0,
@RAM0, R0L
R0L,
P57
Input
Low
level
0
1
1
P57
Input
Low
level
0
1
1
R0L
@RAM0
@PDR5
@PDR5
@RAM0
P56
Input
High
level
0
0
0
P56
Input
High
level
0
0
0
0
0
P55
Output
Low
level
1
0
P55
Output
Low
level
1
0
The PDR5 value (H'80) is written to a work area in
memory (RAM0) as well as to PDR5.
The BSET instruction is executed designating the PDR5
work area (RAM0).
The work area (RAM0) value is written to PDR5.
P54
Output
Low
level
1
0
0
P54
Output
Low
level
1
0
0
P53
Output
Low
level
1
0
0
P53
Output
Low
level
1
0
0
P52
Output
Low
level
1
0
0
P52
Output
Low
level
1
0
0
P51
Output
Low
level
1
0
0
P51
Output
Low
level
1
0
0
P50
Output
Low
level
1
0
0
P50
Output
High
level
1
1
1