HD64F3664FPV Renesas Electronics America, HD64F3664FPV Datasheet - Page 306

IC H8/3664 MCU FLASH 32K 64LQFP

HD64F3664FPV

Manufacturer Part Number
HD64F3664FPV
Description
IC H8/3664 MCU FLASH 32K 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3664FPV

Core Size
16-Bit
Program Memory Size
32KB (32K x 8)
Oscillator Type
External
Core Processor
H8/300H
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
No. Of I/o's
29
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
17.5
17.5.1
When V
notices described below to prevent the data to be destroyed.
1. SCL and SDA should be fixed to V
2. V
3. When V
4. V
17.5.2
The endurance is 10
10
device is page-programmed less than 10
17.5.3
This EEPROM has a noise suppression function at SCL and SDA inputs, that cuts noise of width
less than 50 ns. Be careful not to allow noise of width more than 50 ns because the noise of with
more than 50 ms is recognized as an active pulse.
Rev. 5.00, 03/04, page 278 of 388
SCL
SDA
4
cycles/byte in case of byte programming. The data retention time is more than 10 years when a
turned on from the ground level (V
Legend:R/W: R/W code (0 is for a write and 1 is for a read)
CC
CC
should be turned off after the EEPROM is placed in a standby state.
turn on speed should be longer than 10 us.
CC
Figure 17.7 Sequential Read Operation (when current address read is used)
condition
Usage Notes
Data Protection at V
Write/Erase Endurance
Noise Suppression Time
Start
is turned on or off, the data might be destroyed by malfunction. Be careful of the
ACK: acknowledge
CC
1
is turned on from the intermediate level, malfunction is caused, so V
2
5
cycles/page (1% cumulative failure rate) in case of page programming and
3
Slave address
4
5
CC
On/Off
6
SS
7
CC
).
4
or V
cycles.
R/W ACK
8
SS
9
during V
1
D7
Read Data
CC
on/off.
8
D0
ACK
9
· · · ·
D7
1
Read Data
CC
D0
8
should be
ACK
9
conditon
Stop

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