C8051F040-GQ Silicon Laboratories Inc, C8051F040-GQ Datasheet - Page 232
![IC 8051 MCU 64K FLASH 100TQFP](/photos/12/20/122007/c8051f040-gq_sml.jpg)
C8051F040-GQ
Manufacturer Part Number
C8051F040-GQ
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Datasheets
1.C8051F040-TB.pdf
(328 pages)
2.C8051F040-TB.pdf
(2 pages)
3.C8051F043-GQ.pdf
(328 pages)
Specifications of C8051F040-GQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
100-TQFP, 100-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 13x12b; D/A 2x10b, 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F040DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit or 13-ch x 12-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
64
Ram Memory Size
4352Byte
Cpu Speed
25MHz
No. Of Timers
5
Rohs Compliant
Yes
Data Rom Size
64 KB
A/d Bit Size
12 bit
A/d Channels Available
13
Height
1 mm
Length
14 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
14 mm
Package
100TQFP
Device Core
8051
Family Name
C8051F04x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1205 - DEV KIT FOR F040/F041/F042/F043
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1204
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F040-GQ
Manufacturer:
SiliconL
Quantity:
702
Company:
Part Number:
C8051F040-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F040-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F040-GQR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
C8051F040/1/2/3/4/5/6/7
18.2.3. Message Handler Registers
The Message Handler Registers are read only registers. Their flags can be read via the indexed access
method with CAN0ADR, CAN0DATH, and CAN0DATL. The message handler registers provide interrupt,
error, transmit/receive requests, and new data information.
Please refer to the Bosch CAN User’s Guide for information on the function and use of the Message Han-
dler Registers.
18.2.4. CIP-51 MCU Special Function Registers
C8051F04x family peripherals are modified, monitored, and controlled using Special Function Registers
(SFR’s). Only three of the CAN Controller’s registers may be accessed directly with SFR’s. However, all
CAN Controller registers can be accessed indirectly using three CIP-51 MCU SFR’s: the CAN Data Regis-
ters (CAN0DATH and CAN0DATL) and CAN Address Register (CAN0ADR).
18.2.5. Using CAN0ADR, CAN0DATH, and CANDATL to Access CAN Registers
Each CAN Controller Register has an index number (see Table 18.2). The CAN register address space is
128 words (256 bytes). A CAN register is accessed via the CAN Data Registers (CAN0DATH and
CAN0DATL) when a CAN register’s index number is placed into the CAN Address Register (CAN0ADR).
For example, if the Bit Timing Register is to be configured with a new value, CAN0ADR is loaded with
0x03. The low byte of the desired value is accessed using CAN0DATL and the high byte of the bit timing
register is accessed using CAN0DATH. CAN0DATL is bit addressable for convenience. To load the value
0x2304 into the Bit Timing Register:
Note: CAN0CN, CAN0STA, and CAN0TST may be accessed either by using the index method, or by direct
access with the CIP-51 MCU SFR’s. CAN0CN is located at SFR location 0xF8/SFR page 1 (SFR Definition
18.3), CAN0TST at 0xDB/SFR page 1 (SFR Definition 18.4), and CAN0STA at 0xC0/SFR page 1 (SFR
Definition 18.5).
18.2.6. CAN0ADR Autoincrement Feature
For ease of programming message objects, CAN0ADR features autoincrementing for the index ranges
0x08 to 0x12 (Interface Registers 1) and 0x20 to 0x2A (Interface Registers 2). When the CAN0ADR regis-
ter has an index in these ranges, the CAN0ADR will autoincrement by 1 to point to the next CAN reg-
ister 16-bit word upon a read/write of CAN0DATL. This speeds programming of the frequently-
accessed interface registers when configuring message objects.
NOTE: Table 18.2 below supersedes Figure 5 in Section 3, “Programmer’s Model” of the Bosch CAN
User’s Guide.
232
CAN0ADR = 0x03;
CAN0DATH = 0x23;
CAN0DATL = 0x04;
// Load Bit Timing Register’s index (Table 18.1)
// Move the upper byte into data reg high byte
// Move the lower byte into data reg low byte
Rev. 1.5