C8051F040-GQ Silicon Laboratories Inc, C8051F040-GQ Datasheet - Page 33

IC 8051 MCU 64K FLASH 100TQFP

C8051F040-GQ

Manufacturer Part Number
C8051F040-GQ
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Datasheets

Specifications of C8051F040-GQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
100-TQFP, 100-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 13x12b; D/A 2x10b, 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F040DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit or 13-ch x 12-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
64
Ram Memory Size
4352Byte
Cpu Speed
25MHz
No. Of Timers
5
Rohs Compliant
Yes
Data Rom Size
64 KB
A/d Bit Size
12 bit
A/d Channels Available
13
Height
1 mm
Length
14 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
14 mm
Package
100TQFP
Device Core
8051
Family Name
C8051F04x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1205 - DEV KIT FOR F040/F041/F042/F043
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1204

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F040-GQ
Manufacturer:
SiliconL
Quantity:
702
Part Number:
C8051F040-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F040-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F040-GQR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
1.9.
The C8051F040/1/2/3 devices have an on-board 8-bit SAR ADC (ADC2) with an 8-channel input multi-
plexer and programmable gain amplifier. This ADC features a 500 ksps maximum throughput and true 8-
bit performance with an INL of ±1LSB. Eight input pins are available for measurement and can be pro-
grammed as single-ended or differential inputs. The ADC is under full control of the CIP-51 microcontroller
via the Special Function Registers. The ADC2 voltage reference is selected between the analog power
supply (AV+) and an external VREF pin. On C8051F040/2 devices, ADC2 has its own dedicated VREF2
input pin; on C8051F041/3 devices, ADC2 shares the VREFA input pin with the 12/10-bit ADC0. User soft-
ware may put ADC2 into shutdown mode to save power.
A programmable gain amplifier follows the analog multiplexer. The gain stage can be especially useful
when different ADC input channels have widely varied input voltage signals, or when it is necessary to
"zoom in" on a signal with a large dc offset (in differential mode, a DAC could be used to provide the dc off-
set). The PGA gain can be set in software to 0.5, 1, 2, or 4.
A flexible conversion scheduling system allows ADC2 conversions to be initiated by software commands,
timer overflows, or an external input signal. ADC2 conversions may also be synchronized with ADC0 soft-
ware-commanded conversions. Conversion completions are indicated by a status bit and an interrupt (if
enabled), and the resulting 8-bit data word is latched into an SFR upon completion.
AIN2.0
AIN2.1
AIN2.2
AIN2.3
AIN2.4
AIN2.5
AIN2.6
AIN2.7
8-Bit Analog to Digital Converter (C8051F040/1/2/3 Only)
Differential Measurement
Single-ended or
Analog Multiplexer
+
+
+
+
-
-
-
-
AMUX
8-to-1
Figure 1.13. 8-Bit ADC Diagram
Programmable Gain
X
Amplifier
External VREF
Configuration, Control, and Data Registers
+
-
AV+
AV+
Pin
Rev. 1.5
C8051F040/1/2/3/4/5/6/7
ADC
VREF
8-Bit
SAR
Start Conversion
8
Compare Logic
Window
Write to AD2BUSY
Timer 3 Overflow
CNVSTR2 Input
Timer 2 Overflow
Write to AD0BUSY
(synchronized with
ADC0)
Conversion
Complete
ADC Data
Interrupt
Register
Compare
Interrupt
Window
33

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