ATMEGA8A-MUR Atmel, ATMEGA8A-MUR Datasheet - Page 101
ATMEGA8A-MUR
Manufacturer Part Number
ATMEGA8A-MUR
Description
MCU AVR 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8A-MU.pdf
(308 pages)
Specifications of ATMEGA8A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 16-5.
Note:
16.11.2
8159D–AVR–02/11
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
1. The CTC1 and PWM11:0 bit definition names are obsolete. Use the
WGM13
TCCR1B – Timer/Counter 1 Control Register B
location of these bits are compatible with previous versions of the timer.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Waveform Generation Mode Bit Description
WGM12
(CTC1)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
The FOC1A/FOC1B bits are always read as zero.
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes.
• Bit 7 – ICNC1: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the noise canceler is
activated, the input from the Input Capture Pin (ICP1) is filtered. The filter function requires four
successive equal valued samples of the ICP1 pin for changing its output. The Input Capture is
therefore delayed by four Oscillator cycles when the noise canceler is enabled.
Bit
Read/Write
Initial Value
(PWM11)
WGM11
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
(PWM10)
ICNC1
WGM10
R/W
7
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ICES1
R/W
6
0
Timer/Counter Mode of
Operation
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-bit
CTC
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
PWM, Phase and Frequency Correct
PWM, Phase and Frequency Correct
PWM, Phase Correct
PWM, Phase Correct
CTC
(Reserved)
Fast PWM
Fast PWM
Table
R
5
–
0
(1)
16-5. Modes of operation supported by the Timer/Counter
WGM13
(See “Modes of Operation” on page
R/W
4
0
WGM
WGM12
R/W
12:0 definitions. However, the functionality and
3
0
CS12
R/W
OCR1A
0x03FF
TOP
0xFFFF
0x00FF
0x01FF
0x03FF
0x00FF
0x01FF
ICR1
OCR1A
ICR1
OCR1A
ICR1
–
ICR1
OCR1A
2
0
CS11
R/W
1
0
Update of
OCR1
Immediate
TOP
TOP
TOP
Immediate
BOTTOM
BOTTOM
BOTTOM
BOTTOM
BOTTOM
TOP
TOP
Immediate
–
BOTTOM
BOTTOM
ATmega8A
x
CS10
90.)
R/W
0
0
TOV1 Flag
Set on
MAX
BOTTOM
MAX
TOP
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
MAX
–
TOP
TOP
BOTTOM
BOTTOM
TCCR1B
101
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