ATMEGA8A-MUR Atmel, ATMEGA8A-MUR Datasheet - Page 153

• Manufacturer Part Number: ATMEGA8A-MUR
• Description: MCU AVR 8KB FLASH 16MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8A-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.8
8159D–AVR–02/11
Multi-processor Communication Mode
Table 19-2.
Table 19-3.
The recommendations of the maximum Receiver baud rate error was made under the assump-
tion that the Receiver and Transmitter equally divides the maximum total error.
There are two possible sources for the Receivers Baud Rate error. The Receiver’s system clock
(XTAL) will always have some minor instability over the supply voltage range and the tempera-
ture range. When using a crystal to generate the system clock, this is rarely a problem, but for a
resonator the system clock may differ more than 2% depending of the resonators tolerance. The
second source for the error is more controllable. The baud rate generator can not always do an
exact division of the system frequency to get the baud rate wanted. In this case an UBRR value
that gives an acceptable low error can be used if possible.
Setting the Multi-processor Communication mode (MPCM) bit in UCSRA enables a filtering
function of incoming frames received by the USART Receiver. Frames that do not contain
address information will be ignored and not put into the receive buffer. This effectively reduces
the number of incoming frames that has to be handled by the CPU, in a system with multiple
MCUs that communicate via the same serial bus. The Transmitter is unaffected by the MPCM
setting, but has to be used differently when it is a part of a system utilizing the Multi-processor
Communication mode.
If the Receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop bit indi-
cates if the frame contains data or address information. If the Receiver is set up for frames with
nine data bits, then the ninth bit (RXB8) is used for identifying address and data frames. When
(Data+Parity Bit)
(Data+Parity Bit)
D#
10
D#
5
6
7
8
9
10
5
6
7
8
9
Recommended Maximum Receiver Baud Rate Error for Normal Speed Mode
(U2X = 0)
Recommended Maximum Receiver Baud Rate Error for Double Speed Mode
(U2X = 1)
R
R
94,12
94,92
95,52
96,00
96,39
96,70
slow
93,20
94,12
94,81
95,36
95,81
96,17
slow
(%)
(%)
R
105,66
104,92
104,35
103,90
103,53
103,23
R
106,67
105,79
105,11
104,58
104,14
103,78
fast
fast
(%)
(%)
Max Total Error
Max Total Error
+5.66/-5.88
+4.92/-5.08
+4.35/-4.48
+3.90/-4.00
+3.53/-3.61
+3.23/-3.30
+5.79/-5.88
+5.11/-5.19
+4.58/-4.54
+4.14/-4.19
+3.78/-3.83
+6.67/-6.8
(%)
(%)
Recommended Max Receiver
Recommended Max Receiver
ATmega8A
Error (%)
Error (%)
± 2.5
± 2.0
± 1.5
± 1.5
± 1.5
± 1.0
± 3.0
± 2.0
± 2.0
± 2.0
± 1.5
± 1.5
153