ATMEGA8A-MUR Atmel, ATMEGA8A-MUR Datasheet - Page 70
ATMEGA8A-MUR
Manufacturer Part Number
ATMEGA8A-MUR
Description
MCU AVR 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8A-MU.pdf
(308 pages)
Specifications of ATMEGA8A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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14. 8-bit Timer/Counter0
14.1
14.2
14.2.1
14.2.2
8159D–AVR–02/11
Features
Overview
Registers
Definitions
•
•
•
•
Timer/Counter0 is a general purpose, single channel, 8-bit Timer/Counter module. A simplified
block diagram of the 8-bit Timer/Counter is shown in
I/O pins, refer to
and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in
the
Figure 14-1. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) is an 8-bit register. Interrupt request (abbreviated to Int. Req. in the
figure) signals are all visible in the Timer Interrupt Flag Register (TIFR). All interrupts are individ-
ually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in
the figure since these registers are shared by other timer units.
The Timer/Counter can be clocked internally or via the prescaler, or by an external clock source
on the T0 pin. The Clock Select logic block controls which clock source and edge the
Timer/Counter uses to increment its value. The Timer/Counter is inactive when no clock source
is selected. The output from the clock select logic is referred to as the timer clock (clk
Many register and bit references in this document are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. However, when using the register or bit
Single Channel Counter
Frequency Generator
External Event Counter
10-bit Clock Prescaler
“Register Description” on page
“Pin Configurations” on page
Timer/Counter
TCNTn
count
Control Logic
73.
=
TCCRn
0xFF
2. CPU accessible I/O Registers, including I/O bits
clk
Tn
Figure
14-1. For the actual placement of
( From Prescaler )
Clock Select
Detector
Edge
ATmega8A
TOVn
(Int.Req.)
Tn
T0
).
70
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