AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 156
AT32UC3L064-AUT
Manufacturer Part Number
AT32UC3L064-AUT
Description
MCU AVR32 64KB FLASH 48TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.AT32UC3L-EK.pdf
(858 pages)
3.AT32UC3L016-D3HT.pdf
(110 pages)
Specifications of AT32UC3L064-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L064-AUT
Manufacturer:
HONGFA
Quantity:
30 000
Part Number:
AT32UC3L064-AUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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12.6.4.2
32099F–11/2010
Entering Shutdown sleep mode
The table gives the possible usage of the I/O lines that stay powered during the Shutdown sleep
mode. If no special function are used, then the I/O lines will keep its settings before entering the
sleep mode
Table 12-3.
Before entering the Shutdown sleep mode, a few actions are required:
.
As soon as the Shutdown sleep mode is entered, all CPU and peripherals are reset to ensure a
consistent state.
POR33 and RC32K oscillator are automatically disabled when entering the Shutdown sleep
mode to save extra power
Pin
PA11
PA13
PA20
PA21
PB04
PB05
PB10
RESET_N
– AST core logic (internal counter and alarm detection logic)
– Backup Registers
– I/O lines PA11, PA13, PA20, PA21, PB04, PB05, PB10
– RESET_N line
– All modules should normally be disabled before entering Shutdown sleep mode (see
– The POR33 (see System Control Interface “SCIF” chapter) must be masked to avoid
– The 32KHz RC oscillator (RC32K) must be running and stable. This is done by
Section
any spurious reset when the power is back. This is done by writing a one to the
POR33MASK bit of the SCIF.VREGCR register. Because of internal
synchronisation, this bit must be read as a one before the sleep instruction is
executed by the CPU.
writing a one to the EN bit of the SCIF.RC32KCR register. Because of internal
synchronisation, this bit must be read as a one to ensure that the oscillator is stable
before the sleep instruction is executed by the CPU
I/O Lines Usage During Shutdown Mode
12.6.3.4)
Possible Usage During Shutdown Sleep Mode
XIN32_2 (2nd 32KHz crystal oscillator)
WAKE_N signal (active low wake-up)
XOUT32_2
Reset pin
AT32UC3L016/32/64
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