AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 493
![MCU AVR32 64KB FLASH 48TQFP](/photos/6/82/68248/313-48-vqfp_sml.jpg)
AT32UC3L064-AUT
Manufacturer Part Number
AT32UC3L064-AUT
Description
MCU AVR32 64KB FLASH 48TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.AT32UC3L-EK.pdf
(858 pages)
3.AT32UC3L016-D3HT.pdf
(110 pages)
Specifications of AT32UC3L064-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L064-AUT
Manufacturer:
HONGFA
Quantity:
30 000
Part Number:
AT32UC3L064-AUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 493 of 858
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• IDLE: Master Interface is Idle
• CCOMP: Command Complete
• CRDY: Ready for More Commands
• TXRDY: THR Data Ready
• RXRDY: RHR Data Ready
32099F–11/2010
This bit is set when no command is in progress, and no command waiting to be issued.
Otherwise, this bit is cleared.
This bit is set when the current command has completed successfully.
Not set if the command failed due to conditions such as a NAK receved from slave.
This bit is cleared by writing 1 to the corresponding bit in the Status Clear Register (SCR).
This bit is set when CMDR and/or NCMDR is ready to receive one or more commands.
This bit is cleared when this is no longer true.
This bit is set when THR is ready for one or more data bytes.
This bit is cleared when this is no longer true (i.e. THR is full or transmission has stopped).
This bit is set when RX data are ready to be read from RHR.
This bit is cleared when this is no longer true.
AT32UC3L016/32/64
493
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