ATMEGA649A-AU Atmel, ATMEGA649A-AU Datasheet - Page 203

• Manufacturer Part Number: ATMEGA649A-AU
• Description: IC MCU AVR 64K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.11.5
8284A–AVR–10/10
UBRRnL and UBRRnH – USART Baud Rate Registers n
Figure 19-12. UCPOLn Bit Settings
• Bit 15:12 – Reserved
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRnH is written.
• Bit 11:0 – UBRR[11:0]: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four
most significant bits, and the UBRRnL contains the eight least significant bits of the USART
baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud
rate is changed. Writing UBRRnL will trigger an immediate update of the baud rate prescaler.
Bit
Read/Write
Initial Value
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
UCPOLn
0
1
R/W
15
R
–
7
0
0
R/W
14
Transmitted Data Changed (Output
of TxD Pin)
Rising XCK Edge
Falling XCK Edge
R
–
6
0
0
R/W
13
R
–
5
0
0
R/W
12
R
–
4
0
0
UBRRn[7:0]
R/W
R/W
11
3
0
0
R/W
R/W
10
2
0
0
UBRRn[11:8]
Received Data Sampled (Input
on RxD Pin)
Falling XCK Edge
Rising XCK Edge
R/W
R/W
9
1
0
0
R/W
R/W
8
0
0
0
UBRRnH
UBRRnL
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