ATMEGA649A-AU Atmel, ATMEGA649A-AU Datasheet - Page 54

IC MCU AVR 64K FLASH 64TQFP

ATMEGA649A-AU

Manufacturer Part Number
ATMEGA649A-AU
Description
IC MCU AVR 64K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA649A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA649A-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA649A-AUR
Manufacturer:
Atmel
Quantity:
10 000
8284A–AVR–10/10
• Bit 3 – WDE: Watchdog Enable
When the WDE is written to logic one, the Watchdog Timer is enabled, and if the WDE is written
to logic zero, the Watchdog Timer function is disabled. WDE can only be cleared if the WDCE bit
has logic level one. To disable an enabled Watchdog Timer, the following procedure must be
followed:
1. In the same operation, write a logic one to WDCE and WDE. A logic one must be written
2. Within the next four clock cycles, write a logic 0 to WDE. This disables the Watchdog.
In safety level 2, it is not possible to disable the Watchdog Timer, even with the algorithm
described above.
page
• Bits 2:0 – WDP2, WDP1, WDP0: Watchdog Timer Prescaler 2, 1, and 0
The WDP2, WDP1, and WDP0 bits determine the Watchdog Timer prescaling when the Watch-
dog Timer is enabled. The different prescaling values and their corresponding Time-out Periods
are shown in
Table 10-2.
WDP2
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
to WDE even though it is set to one before the disable operation starts.
0
0
0
0
1
1
1
1
52.
WDP1
Table
0
0
1
1
0
0
1
1
Watchdog Timer Prescale Select
”Timed Sequences for Changing the Configuration of the Watchdog Timer” on
10-2.
WDP0
0
1
0
1
0
1
0
1
Oscillator Cycles
Number of WDT
1,024K cycles
2,048K cycles
128K cycles
256K cycles
512K cycles
16K cycles
32K cycles
64K cycles
Typical Time-out at
V
CC
17.1 ms
34.3 ms
68.5 ms
0.14 s
0.27 s
0.55 s
1.1 s
2.2 s
= 3.0V
Typical Time-out at
V
CC
16.3 ms
32.5 ms
65 ms
0.13 s
0.26 s
0.52 s
1.0 s
2.1 s
= 5.0V
54

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