ATMEGA649A-AU Atmel, ATMEGA649A-AU Datasheet - Page 232

• Manufacturer Part Number: ATMEGA649A-AU
• Description: IC MCU AVR 64K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.9
22.9.1
8284A–AVR–10/10
Register Description
ADMUX – ADC Multiplexer Selection Register
• Bit 7:6 – REFS1:0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in
these bits are changed during a conversion, the change will not go in effect until this conversion
is complete (ADIF in ADCSRA is set). The internal voltage reference options may not be used if
an external reference voltage is being applied to the AREF pin.
Table 22-3.
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
sions. For a complete description of this bit, see
page
• Bits 4:0 – MUX4:0: Analog Channel Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC.
See
change will not go in effect until this conversion is complete (ADIF in ADCSRA is set).
Bit
(0x7C)
Read/Write
Initial Value
REFS1
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
0
0
1
1
Table 22-4 on page 233
235.
REFS0
Voltage Reference Selections for ADC
0
1
0
1
REFS1
R/W
7
0
Voltage Reference Selection
AREF, Internal Voltage Reference turned off
AVCC with external capacitor at AREF pin
Reserved
Internal 1.1V Voltage Reference with external capacitor at AREF pin
REFS0
R/W
6
0
for details. If these bits are changed during a conversion, the
ADLAR
R/W
5
0
MUX4
R/W
4
0
”ADCL and ADCH – The ADC Data Register” on
MUX3
R/W
3
0
MUX2
R/W
2
0
Table 22-3 on page
MUX1
R/W
1
0
MUX0
R/W
0
0
ADMUX
232. If
232