ATMEGA649A-AU Atmel, ATMEGA649A-AU Datasheet - Page 325

• Manufacturer Part Number: ATMEGA649A-AU
• Description: IC MCU AVR 64K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8284A–AVR–10/10
Figure 27-8. Parallel Programming Timing, Loading Sequence with Timing Requirements
Note:
Figure 27-9. Parallel Programming Timing, Reading Sequence (within the Same Page) with
Note:
Table 27-13. Parallel Programming Characteristics, V
Symbol
V
I
t
t
t
t
t
PP
DVXH
XLXH
XHXL
XLDX
XLWL
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
PP
XTAL1
PAGEL
XTAL1
DATA
DATA
BS1
XA0
XA1
BS1
XA0
XA1
OE
1. The timing requirements shown in
1. The timing requirements shown in
ing operation.
apply to reading operation.
Parameter
Programming Enable Voltage
Programming Enable Current
Data and Control Valid before XTAL1 High
XTAL1 Low to XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
XTAL1 Low to WR Low
Timing Requirements
ADDR0 (Low Byte)
LOAD ADDRESS
ADDR0 (Low Byte)
LOAD ADDRESS
(LOW BYTE)
(LOW BYTE)
t
XLOL
t
OLDV
(1)
LOAD DATA
(LOW BYTE)
DATA (Low Byte)
DATA (Low Byte)
READ DATA
(LOW BYTE)
Figure 27-7
Figure 27-7 on page 324
t
XLXH
t
BVDV
(i.e., t
(HIGH BYTE)
LOAD DATA
CC
= 5V ± 10%
DATA (High Byte)
DVXH
(HIGH BYTE)
READ DATA
DATA (High Byte)
t
XLPH
, t
LOAD DATA
XHXL
(i.e., t
11.5
Min
200
150
67
67
0
, and t
t
OHDZ
t
DVXH
PLXH
Typ
XLDX
, t
LOAD ADDRESS
XHXL
LOAD ADDRESS
(LOW BYTE)
(LOW BYTE)
) also apply to load-
ADDR1 (Low Byte)
ADDR1 (Low Byte)
, and t
Max
12.5
250
XLDX
Units
) also
μA
ns
ns
ns
ns
ns
(1)
V
325