ATMEGA649A-AU Atmel, ATMEGA649A-AU Datasheet - Page 93

• Manufacturer Part Number: ATMEGA649A-AU
• Description: IC MCU AVR 64K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.4
13.4.1
13.4.2
13.4.3
13.4.4
13.4.5
13.4.6
13.4.7
8284A–AVR–10/10
Register Description
MCUCR – MCU Control Register
PORTA – Port A Data Register
DDRA – Port A Data Direction Register
PINA – Port A Input Pins Address
PORTB – Port B Data Register
DDRB – Port B Data Direction Register
PINB – Port B Input Pins Address
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 67
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
0x02 (0x22)
Read/Write
Initial Value
Bit
0x01 (0x21)
Read/Write
Initial Value
Bit
0x00 (0x20)
Read/Write
Initial Value
Bit
0x05 (0x25)
Read/Write
Initial Value
Bit
0x04 (0x24)
Read/Write
Initial Value
Bit
0x03 (0x23)
Read/Write
Initial Value
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
PORTA7
PORTB7
PINA7
PINB7
DDA7
DDB7
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R/W
JTD
7
0
7
7
0
7
0
7
0
7
7
0
PORTA6
PORTB6
PINA6
PINB6
DDA6
DDB6
R/W
R/W
R/W
BODS
R/W
R/W
R/W
N/A
N/A
R/W
6
0
6
6
0
6
0
6
0
6
6
0
for more details about this feature.
PORTB5
PORTA5
PINA5
PINB5
DDA5
DDB5
R/W
R/W
R/W
BODSE
R/W
N/A
R/W
R/W
N/A
5
5
0
5
0
5
0
5
0
5
R/W
5
0
PORTB4
PORTA4
PINA4
PINB4
DDA4
DDB4
R/W
R/W
R/W
R/W
N/A
R/W
R/W
N/A
4
4
0
4
0
4
0
4
0
4
PUD
R/W
4
0
PORTB3
PORTA3
PINA3
PINB3
DDA3
DDB3
R/W
R/W
R/W
R/W
N/A
R/W
R/W
N/A
3
3
0
3
0
3
0
3
0
3
R
3
–
0
PORTB2
PORTA2
PINA2
PINB2
DDA2
DDB2
R/W
R/W
R/W
N/A
R/W
R/W
R/W
N/A
2
2
0
2
0
2
0
2
0
2
R
2
–
0
PORTB1
PORTA1
PINA1
DDA1
PINB1
DDB1
R/W
R/W
N/A
R/W
R/W
R/W
R/W
IVSEL
N/A
1
R/W
1
0
1
0
1
0
1
0
1
1
0
PORTB0
PORTA0
PINA0
DDA0
PINB0
DDB0
R/W
IVCE
R/W
N/A
R/W
R/W
R/W
R/W
R/W
N/A
0
0
0
0
0
0
0
0
0
0
0
0
MCUCR
PORTA
PORTB
DDRA
DDRB
PINA
PINB
”Con-
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