ATMEGA649A-AU Atmel, ATMEGA649A-AU Datasheet - Page 356

IC MCU AVR 64K FLASH 64TQFP

ATMEGA649A-AU

Manufacturer Part Number
ATMEGA649A-AU
Description
IC MCU AVR 64K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA649A-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA649A-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA649A-AUR
Manufacturer:
Atmel
Quantity:
10 000
28.8
Table 28-18. SPI Timing Parameters
Notes:
8284A–AVR–10/10
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
SPI Timing Characteristics
1. In SPI Programming mode the minimum SCK high/low period is:
- 2 t
- 3 t
CLCL
CLCL
SS high to tri-state
SCK to out high
SCK to SS high
SCK high/low
for f
for f
SS low to SCK
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
Description
SCK period
Out to SCK
SCK period
SCK to out
SCK to out
CK
CK
Setup
Setup
Hold
Hold
< 12 MHz
> 12 MHz
See
Figure 28-4. SPI Interface Timing Requirements (Master Mode)
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
Figure 28-4 on page 356
(1)
(Data Output)
(Data Input)
(CPOL = 0)
(CPOL = 1)
MISO
MOSI
SCK
SCK
SS
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
6
4
MSB
5
MSB
and
Figure 28-5 on page 357
20 • t
4 • t
2 • t
Min
10
20
t
7
ck
ck
ck
ck
...
See
...
Table 18-5 on page 174
50% duty cycle
0.5 • t
Typ
3.6
1.6
10
10
10
10
15
15
10
for details.
sck
2
LSB
1
LSB
2
Max
3
8
ns
µs
ns
356

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